NXP Semiconductors KE1xF Series, Reference Manual, Page: 1400 / 1483

CANx_CTRL1 field descriptions (continued)
Field Description
negation occurs before 128 sequences of 11 recessive bits are detected on the CAN bus, then Bus Off
recovery happens as if the BOFFREC bit had never been asserted. If the negation occurs after 128
sequences of 11 recessive bits occurred, then FlexCAN will re-synchronize to the bus by waiting for 11
recessive bits before joining the bus. After negation, the BOFFREC bit can be re-asserted again during
Bus Off, but it will be effective only the next time the module enters Bus Off. If BOFFREC was negated
when the module entered Bus Off, asserting it during Bus Off will not be effective for the current Bus Off
recovery.
NOTE: Refer to Bus off in the CAN Protocol standard (ISO 11898-1) for details.
0 Automatic recovering from Bus Off state enabled.
1 Automatic recovering from Bus Off state disabled.
5
TSYN
Timer Sync
This bit enables a mechanism that resets the free-running timer each time a message is received in
Message Buffer 0. This feature provides means to synchronize multiple FlexCAN stations with a special
“SYNC” message, that is, global network time. If the RFEN bit in CAN_MCR is set (Rx FIFO enabled), the
first available Mailbox, according to CAN_CTRL2[RFFN] setting, is used for timer synchronization instead
of MB0. This bit can be written in Freeze mode only because it is blocked by hardware in other modes.
0 Timer Sync feature disabled
1 Timer Sync feature enabled
4
LBUF
Lowest Buffer Transmitted First
This bit defines the ordering mechanism for Message Buffer transmission. When asserted, the
CAN_MCR[LPRIOEN] bit does not affect the priority arbitration. This bit can be written in Freeze mode
only because it is blocked by hardware in other modes.
0 Buffer with highest priority is transmitted first.
1 Lowest number buffer is transmitted first.
3
LOM
Listen-Only Mode
This bit configures FlexCAN to operate in Listen-Only mode. In this mode, transmission is disabled, all
error counters described in CAN_ECR register are frozen and the module operates in a CAN Error
Passive mode. Only messages acknowledged by another CAN station will be received. If FlexCAN detects
a message that has not been acknowledged, it will flag a BIT0 error without changing the receive error
counter (RXERRCNT) in CAN_ECR register, as if it was trying to acknowledge the message.
Listen-Only mode is acknowledged by the state of CAN_ESR1[FLTCONF] field indicating Passive Error.
There can be some delay between the Listen-Only mode request and acknowledge.
This bit can be written in Freeze mode only because it is blocked by hardware in other modes.
0 Listen-Only mode is deactivated.
1 FlexCAN module operates in Listen-Only mode.
PROPSEG Propagation Segment
This 3-bit field defines the length of the Propagation Segment in the bit time. The valid programmable
values are 0–7. This field can be written only in Freeze mode because it is blocked by hardware in other
modes.
Propagation Segment Time = (P 1) × Time-Quanta.
Time-Quantum = one Sclock period.
Memory map/register definition
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
1400 NXP Semiconductors