NXP Semiconductors K32 L2A Series, Reference Manual, Page: 988 / 1379

PMC_REGSC field descriptions (continued)
Field Description
0 Peripherals and I/O pads are in normal run state.
1 Certain peripherals and I/O pads are in an isolated and latched state.
2
REGONS
Regulator In Run Regulation Status
This read-only field provides the current status of the internal voltage regulator.
0 Regulator is in stop regulation or in transition to/from it
1 Regulator is in run regulation
1
Reserved
This field is reserved.
NOTE: This reserved bit must remain cleared (set to 0).
0
BGBE
Bandgap Buffer Enable
Enables the bandgap buffer.
0 Bandgap buffer not enabled
1 Bandgap buffer enabled
37.6.6 High Voltage Detect Status And Control 1 register
(PMC_HVDSC1)
This register contains status and control bits to support the high voltage detect function.
This register should be written during the reset initialization program to set the desired
controls even if the desired settings are the same as the reset settings.
While the device is in the very low power or low leakage modes, the HVD system is
disabled regardless of HVDSC1 settings. To protect systems that must have HVD always
on, configure the Power Mode Protection (PMPROT) register of the SMC module
(SMC_PMPROT) to disallow any very low power or low leakage modes from being
enabled.
See the device's data sheet for the exact HVD trip voltages.
NOTE
This register is reset solely on a POR Only event.For more
information about these reset types, refer to the Reset section
details.
Memory map and register descriptions
K32 L2A Reference Manual, Rev. 2, 01/2020
988 NXP Semiconductors