NXP Semiconductors K32 L2A Series, Reference Manual, Page: 912 / 1379

MTBx0_DWT_MASKn field descriptions (continued)
Field Description
Using a mask means the comparator matches on a range of addresses, defined by the unmasked most
significant bits of the address, bits [31:x]. The maximum MASK value is 24, producing a 16 Mbyte mask.
An attempted write of a MASK value > 24 is limited by the MTBDWT hardware to 24.
If MTBDWT_COMP0 is used as a data value comparator, then MTBDWT_MASK0 should be programmed
to zero.
35.3.2.4 MTB_DWT Comparator Function Register 0
(MTBx0_DWT_FCT0)
The MTBDWT_FCTn registers control the operation of comparator n.
Address: F000_1000h base + 28h offset = F000_1028h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
MATCHED
0 0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
DATAVADDR0 DATAVSIZE
0
DATAVMATCH
0
FUNCTION
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory map and register definition
K32 L2A Reference Manual, Rev. 2, 01/2020
912 NXP Semiconductors