NXP Semiconductors K32 L2A Series, Reference Manual, Page: 823 / 1379

LPUARTx_CTRL field descriptions (continued)
Field Description
28
TXINV
Transmit Data Inversion
Setting this bit reverses the polarity of the transmitted data output.
NOTE: Setting TXINV inverts the LPUART_TX output for all cases: data bits, start and stop bits, break,
and idle.
0 Transmit data not inverted.
1 Transmit data inverted.
27
ORIE
Overrun Interrupt Enable
This bit enables the overrun flag (OR) to generate hardware interrupt requests.
0 OR interrupts disabled; use polling.
1 Hardware interrupt requested when OR is set.
26
NEIE
Noise Error Interrupt Enable
This bit enables the noise flag (NF) to generate hardware interrupt requests.
0 NF interrupts disabled; use polling.
1 Hardware interrupt requested when NF is set.
25
FEIE
Framing Error Interrupt Enable
This bit enables the framing error flag (FE) to generate hardware interrupt requests.
0 FE interrupts disabled; use polling.
1 Hardware interrupt requested when FE is set.
24
PEIE
Parity Error Interrupt Enable
This bit enables the parity error flag (PF) to generate hardware interrupt requests.
0 PF interrupts disabled; use polling).
1 Hardware interrupt requested when PF is set.
23
TIE
Transmit Interrupt Enable
Enables STAT[TDRE] to generate interrupt requests.
0 Hardware interrupts from TDRE disabled; use polling.
1 Hardware interrupt requested when TDRE flag is 1.
22
TCIE
Transmission Complete Interrupt Enable for
TCIE enables the transmission complete flag, TC, to generate interrupt requests.
0 Hardware interrupts from TC disabled; use polling.
1 Hardware interrupt requested when TC flag is 1.
21
RIE
Receiver Interrupt Enable
Enables STAT[RDRF] to generate interrupt requests.
0 Hardware interrupts from RDRF disabled; use polling.
1 Hardware interrupt requested when RDRF flag is 1.
Table continues on the next page...
Chapter 31 Low Power Universal Asynchronous Receiver/Transmitter (LPUART)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 823