NXP Semiconductors K32 L2A Series, Reference Manual, Page: 819 / 1379

LPUARTx_STAT field descriptions (continued)
Field Description
Setting this bit reverses the order of the bits that are transmitted and received on the wire. This bit does
not affect the polarity of the bits, the location of the parity bit or the location of the start or stop bits. This bit
should only be changed when the transmitter and receiver are both disabled.
0 LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the
start bit is identified as bit0.
1 MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the
setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is
identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].
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RXINV
Receive Data Inversion
Setting this bit reverses the polarity of the received data input.
NOTE: Setting RXINV inverts the LPUART_RX input for all cases: data bits, start and stop bits, break,
and idle.
0 Receive data not inverted.
1 Receive data inverted.
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RWUID
Receive Wake Up Idle Detect
For RWU on idle character, RWUID controls whether the idle character that wakes up the receiver sets the
IDLE bit. For address match wakeup, RWUID controls if the IDLE bit is set when the address does not
match. This bit should only be changed when the receiver is disabled.
0 During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle
character. During address match wakeup, the IDLE bit does not get set when an address does not
match.
1 During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character.
During address match wakeup, the IDLE bit does get set when an address does not match.
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BRK13
Break Character Generation Length
BRK13 selects a longer transmitted break character length. Detection of a framing error is not affected by
the state of this bit. This bit should only be changed when the transmitter is disabled.
0 Break character is transmitted with length of 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS =
0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).
1 Break character is transmitted with length of 13 bit times (if M = 0, SBNS = 0) or 14 (if M = 1, SBNS =
0 or M = 0, SBNS = 1) or 15 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 16 (if M10 = 1, SNBS = 1).
25
LBKDE
LIN Break Detection Enable
LBKDE selects a longer break character detection length. While LBKDE is set, receive data is not stored
in the receive data buffer.
0 Break character is detected at length 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M
= 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).
1 Break character is detected at length of 11 bit times (if M = 0, SBNS = 0) or 12 (if M = 1, SBNS = 0 or
M = 0, SBNS = 1) or 14 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 15 (if M10 = 1, SNBS = 1).
24
RAF
Receiver Active Flag
RAF is set when the receiver detects the beginning of a valid start bit, and RAF is cleared automatically
when the receiver detects an idle line.
Table continues on the next page...
Chapter 31 Low Power Universal Asynchronous Receiver/Transmitter (LPUART)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 819