NXP Semiconductors K32 L2A Series, Reference Manual, Page: 662 / 1379

INTMUXx_CHn_IPR_31_0 field descriptions
Field Description
INTP Interrupt Pending
These bits represent the interrupt source pending status of this channel.
0 No interrupt.
1 Interrupt is pending.
25.3 Functional Description
The Interrupt Multiplexer (INTMUX) routes the interrupt sources to the interrupt outputs.
There is one interrupt output for each channel available in the INTMUX. All interrupt
sources are available to each channel. There are 4 multiplex channels, and there are 32
interrupt sources.
The INTMUX module provides interrupt status registers to monitor interrupt pending
status and vector numbers. This module also implements the ability to logical AND or
OR enabled interrupts on a given channel. Software resets can also be performed on a
given channel.
See the chip specific Interrupt section for more information regarding the interrupt
vectors and sources.
25.3.1 Configuring Output Channels
There is a single set of 32 source interrupts for the INTMUX. Each of the 4 output
channels can be configured to output any combination of the source interrupts.
To enable source interrupts on a channel, write a mask value to the Channel n Interrupt
Enable Register (CHn_IER_31_0). Each bit of these registers corresponds to one of the
32 source interrupts. Bit n enables source interrupt n on the given channel.
Further control for each output channel is available by selecting the Boolean operation to
perform on pending interrupts. The default is logical OR, but logical AND can be
selected via the CHn_CSR[AND] register bit.
Functional Description
K32 L2A Reference Manual, Rev. 2, 01/2020
662 NXP Semiconductors