NXP Semiconductors K32 L2A Series, Reference Manual, Page: 60 / 1379

Table 3-7. AWIC stop wake-up sources (continued)
Wake-up source Description
LPI2C Any enabled interrupt can be a source as long as the module remains clocked.
LPUART Any enabled interrupt can be a source as long as the module remains clocked.
RTC Alarm or seconds interrupt
TSI Any enabled interrupt can be a source as long as the module remains clocked.
NMI NMI_b pin
TPM Any enabled interrupt can be a source as long as the module remains clocked.
LPTMRx Any enabled interrupt can be a source as long as the module remains clocked.
LPSPI Any enabled interrupt can be a source as long as the module remains clocked.
LPIT Any enabled interrupt can be a source as long as the module remains clocked.
FlexIO Any enabled interrupt can be a source as long as the module remains clocked.
USB Wake-up
System Modules
Crossbar Switch
3.5.1.1 Crossbar switch master assignments
The masters connected to the crossbar switch are assigned as follows:
AXBS0 Master module Master port number
Core 0- Arm core unified bus 0
DMA0 1
USB0 2
Reserved 3
3.5.1.2 Crossbar switch slave assignments
The slaves connected to the crossbar switch are assigned as follows:
AXBS0 Slave module Slave port number
Flash memory controller and Boot ROM 0
Core 0 SRAM controller 1
Table continues on the next page...
3.5
3.5.1
System Modules
K32 L2A Reference Manual, Rev. 2, 01/2020
60 NXP Semiconductors