NXP Semiconductors K32 L2A Series, Reference Manual, Page: 561 / 1379

Field Function
The stop bit can be added on a timer compare (between each word) or on a timer disable. When stop bit
is enabled, configured shifters will output the contents of the stop bit when the timer is disabled. When
stop bit is enabled on timer disable, the timer remains disabled until the next rising edge of the shift clock.
If configured for both timer compare and timer disable, only one stop bit is inserted on timer disable.
00b - Stop bit disabled
01b - Stop bit is enabled on timer compare
10b - Stop bit is enabled on timer disable
11b - Stop bit is enabled on timer compare and timer disable
3-2
—
1
TSTART
Timer Start Bit
When start bit is enabled, configured shifters will output the contents of the start bit when the timer is
enabled and the timer counter will reload from the compare register on the first rising edge of the shift
clock.
0b - Start bit disabled
1b - Start bit enabled
0
—
22.2.1.22 Timer Compare N (TIMCMPa)
22.2.1.22.1 Address
Register Offset
TIMCMP0 400CA500h
TIMCMP1 400CA504h
TIMCMP2 400CA508h
TIMCMP3 400CA50Ch
TIMCMP4 400CA510h
TIMCMP5 400CA514h
TIMCMP6 400CA518h
TIMCMP7 400CA51Ch
22.2.1.22.2 Function
.
Chapter 22 Flexible I/O (FlexIO)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 561