NXP Semiconductors K32 L2A Series, Reference Manual, Page: 499 / 1379

EMVSIMx_RX_STATUS field descriptions (continued)
Field Description
13
FEF
Frame Error Flag
Used to indicate if the current received byte did not have proper STOP bits. This will not cause a NACK
transmission.
This bit will not cause an interrupt assertion. It is simply an indication that a framing error has occured.
0 No frame error detected
1 Frame error detected
12
PEF
Parity Error Flag
Used to indicate if a received byte had a parity error or not. A parity error will cause transmission of NACK
if ANACK bit is set in CTRL register and PEF bit will not be asserted. When ANACK is
not set, PEF will be
asserted.
This bit will also not assert when ICM bit is set; however parity is checked in ICM = 1 mode. It is simply an
indication that a parity error has occured.
0 No parity error detected
1 Parity error detected
11
BGT_ERR
Block Guard Time Error Flag
Used to indicate if the block guard time was too small. The threshold is set by the block guard time
register.
0 Block guard time was sufficient
1 Block guard time was too small
10
BWT_ERR
Block Wait Time Error Flag
Used to indicate if the block wait time has been exceeded. The threshold is set by the block wait time
registers.
0 Block wait time not exceeded
1 Block wait time was exceeded
9
RTE
Received NACK Threshold Error Flag
Used to indicate whether the number of consecutive NACK’s generated by the EMV SIM module in
response to receive parity errors, for the byte being received, equals the value programmed in the
RTH[3:0] in the RX_THRESHOLD register. This bit will never set unless the ANACK bit is set in the CNTL
register. The SAPDx bit in the CNTL resister must be set to enable the threshold error to trigger the auto
power down sequence. RTE is a write once to clear bit. Clearing this bit also resets the internal counter for
consecutive NACK’s being transmitted for a given byte.
0 Number of NACKs generated by the receiver is less than the value programmed in RTH[3:0]
1 Number of NACKs generated by the receiver is equal to the value programmed in RTH[3:0]
8
CWT_ERR
Character Wait Time Error Flag
Used to indicate when the time between received characters is equal to or greater than the value
programmed in the CHAR_WAIT register.
0 No CWT violation has occurred (default).
1 Time between two consecutive characters has exceeded the value in CHAR_WAIT.
7
CRC_OK
CRC Check OK Flag
Table continues on the next page...
Chapter 21 Smart Card Interface Module (EMV SIM)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 499