NXP Semiconductors K32 L2A Series, Reference Manual, Page: 410 / 1379

• 8-channel implementation that performs complex data transfers with minimal
intervention from a host processor
• Connections to the crossbar switch for bus mastering the data movement
• Transfer control descriptor (TCD) organized to support two-deep, nested transfer
operations
• 32-byte TCD stored in local memory for each channel
• An inner data transfer loop defined by a minor byte transfer count
• An outer data transfer loop defined by a major iteration count
• Channel activation via one of three methods:
• Explicit software initiation
• Initiation via a channel-to-channel linking mechanism for continuous transfers
• Peripheral-paced hardware requests, one per channel
• Fixed-priority and round-robin channel arbitration
• Channel completion reported via programmable interrupt requests
• One interrupt per channel, which can be asserted at completion of major iteration
count
• Programmable error terminations per channel and logically summed together to
form one error interrupt to the interrupt controller
• Programmable support for scatter/gather DMA processing
• Support for complex data structures
In the discussion of this module, n is used to reference the channel number.
20.2 Modes of operation
The eDMA operates in the following modes:
Table 20-3. Modes of operation
Mode Description
Normal In Normal mode, the eDMA transfers data between a source and a destination. The source and
destination can be a memory block or an I/O block capable of operation with the eDMA.
Table continues on the next page...
Modes of operation
K32 L2A Reference Manual, Rev. 2, 01/2020
410 NXP Semiconductors