NXP Semiconductors K32 L2A Series, Reference Manual, Page: 393 / 1379

18.5.1.1 DAC data buffer interrupts
There are several interrupts and associated flags that can be configured for the DAC
buffer. SR[DACBFRPBF] is set when the DAC buffer read pointer reaches the DAC
buffer upper limit, that is, C2[DACBFRP] = C2[DACBFUP]. SR[DACBFRPTF] is set
when the DAC read pointer is equal to the start position, 0. Finally, SR[DACBFWMF] is
set when the DAC buffer read pointer has reached the position defined by
C1[DACBFWM]. C1[DACBFWM] can be used to generate an interrupt when the DAC
buffer read pointer is between 1 to 4 words from C2[DACBFUP].
18.5.1.2 Modes of DAC data buffer operation
The following table describes the different modes of data buffer operation for the DAC
module.
Table 18-1. Modes of DAC data buffer operation
Modes Description
Buffer Normal mode
This is the default mode. The buffer works as a circular buffer.
The read pointer increases by one, every time the trigger
occurs. When the read pointer reaches the upper limit, it goes
to 0 directly in the next trigger event.
Buffer Swing mode
This mode is similar to the normal mode. However, when the
read pointer reaches the upper limit, it does not go to 0. It will
descend by 1 in the next trigger events until 0 is reached.
Buffer One-time Scan mode
The read pointer increases by 1 every time the trigger occurs.
When it reaches the upper limit, it stops there. If read pointer
is reset to the address other than the upper limit, it will
increase to the upper address and stop there again.
NOTE: If the software set the read pointer to the upper limit,
the read pointer will not advance in this mode.
18.5.2 DMA operation
When DMA is enabled, DMA requests are generated instead of interrupt requests. The
DMA Done signal clears the DMA request.
The status register flags are still set and are cleared automatically when the DMA
completes.
Chapter 18 12-bit Digital-to-Analog Converter (DAC)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 393