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See
, where addr[30:29] = 10 for peripherals, addr[28] = 1 specifies the
unsigned bit field extract operation, addr[27:23] is "b", the LSB identifier, addr[22:20] is
"w", the bit field width minus 1 identifier, and mem_addr[19:0] specifies the address
offset into the space based at 0x4000_0000 for peripherals. The "-" indicates an address
bit "don't care".
The decorated unsigned bit field extract read operation is defined in the following
pseudo-code as:
rdata = ioubfx<sz>(accessAddress) // unsigned bit field extract
tmp = mem[accessAddress & 0xE00FFFFF, size] // memory read
mask = ((1 << (w+1)) - 1) << b // generate bit mask
rdata = (tmp & mask) >> b // read data returned to core
Like the BFI operation, when the starting bit position plus the field width exceeds the
container size, only part of the source bit field is extracted from the destination memory
location. Stated differently, if (b + w+1) > container_width, only the low-order
"container_width - b" bits are actually extracted. The cycle-by-cycle BME operations are
detailed in the following table.
Table 13-7. Cycle definitions of decorated load: unsigned bit field extract
Pipeline Stage
Cycle
x
x+1
x+2
BME AHB_ap
Forward addr to memory;
Decode decoration; Capture
address, attributes
Idle AHB address phase
<next>
BME AHB_dp
<previous>
Perform memory read; Form
bit mask; Form (rdata & mask)
and capture destination data
in register
Logically right shift registered
data; Return justified rdata to
master
13.4 Application information
In this section, GNU assembler macros with C expression operands are presented as
examples of the required instructions to perform decorated operations.
This section specifically presents a partial bme.h file defining the assembly language
expressions for decorated logical stores: AND, OR, and XOR. Comparable functions for
BFI and the decorated loads are more complex and available in the complete BME header
file.
These macros use the same function names presented in
#define IOANDW(ADDR,WDATA) \
__asm("ldr r3, =(1<<26);" \
"orr r3, %[addr];" \
Application information
K32 L2A Reference Manual, Rev. 2, 01/2020
244
NXP Semiconductors
Summary of Contents for K32 L2A Series
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