NXP Semiconductors K32 L2A Series, Reference Manual, Page: 192 / 1379

ADCx_SC3 field descriptions (continued)
Field Description
5–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3
ADCO
Continuous Conversion Enable
Enables continuous conversions.
0 One conversion or one set of conversions if the hardware average function is enabled, that is,
AVGE=1, after initiating a conversion.
1 Continuous conversions or sets of conversions if the hardware average function is enabled, that is,
AVGE=1, after initiating a conversion.
2
AVGE
Hardware Average Enable
Enables the hardware average function of the ADC.
0 Hardware average function disabled.
1 Hardware average function enabled.
AVGS Hardware Average Select
Determines how many ADC conversions will be averaged to create the ADC average result.
00 4 samples averaged.
01 8 samples averaged.
10 16 samples averaged.
11 32 samples averaged.
11.3.8 ADC Offset Correction Register (ADCx_OFS)
The ADC Offset Correction Register (OFS) contains the user-selected or calibration-
generated offset error correction value. This register is a 2’s complement, left-justified,
16-bit value . The value in OFS is subtracted from the conversion and the result is
transferred into the result registers, Rn. If the result is greater than the maximum or less
than the minimum result value, it is forced to the appropriate limit for the current mode of
operation.
For more information regarding the calibration procedure, please refer to the Calibration
function section.
Address: 4006_6000h base + 28h offset = 4006_6028h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
OFS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
Memory map and register definitions
K32 L2A Reference Manual, Rev. 2, 01/2020
192 NXP Semiconductors