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I/O
USB_DM
USB_DP
5V
IN
OUT
ENABLE
FLAG
power distribution
IC or circuit
VBUS
D-
D+
I/O
ID
I/O
Place resistors close
to the processor
33 Ω
33 Ω
USBVDD
I/O
GND
MCU
VDD
External 5v to 3.3v regulator
3.3v
OUT
IN
USB connector
Figure 51-5. Dual-role diagram
51.3 Programmers interface
This section discusses the major components of the programming model for the USB
module.
51.3.1 Buffer Descriptor Table
To efficiently manage USB endpoint communications USBFS implements a Buffer
Descriptor Table (BDT) in system memory. The BDT resides on a 512-byte boundary in
system memory and is pointed to by the BDT Page Registers. Every endpoint direction
requires two 8-byte Buffer Descriptor (BD) entries. Therefore, a system with 16 fully
bidirectional endpoints would require 512 bytes of system memory to implement the
BDT. The two BD entries allows for an EVEN BD and ODD BD entry for each endpoint
direction. This allows the microprocessor to process one BD while USBFS is processing
the other BD. Double buffering BDs in this way allows USBFS to transfer data easily at
the maximum throughput provided by USB.
Software should manage buffers for USBFS by updating the BDT when needed. This
allows USBFS to efficiently manage data transmission and reception, while the
microprocessor performs communication overhead processing and other function
Chapter 51 Universal Serial Bus Full Speed OTG Controller (USBFSOTG)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
1297
Summary of Contents for K32 L2A Series
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Page 122: ...Flash Memory Clock K32 L2A Reference Manual Rev 2 01 2020 122 NXP Semiconductors...
Page 158: ...Debug and security K32 L2A Reference Manual Rev 2 01 2020 158 NXP Semiconductors...
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