NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1289 / 1379

TSTMRx_H field descriptions (continued)
Field Description
Upper 24 bits of the 56-bit time stamp value.. The software must read the TSTMR_L first, followed by a
read to TSTMR_H to retrieve the complete value. The all-zero reset value may not be readable because
the value will increment before it can be read by the software.
50.3 Functional description
The TSTMR module is a free running incrementing counter that starts running after
system reset de-assertion and can be read at any time by the software for determining the
software ticks. However, the software must follow the read sequence as mentioned in the
TSTMR register descriptions for correctly reading the TSTMR value. The TSTMR is a
56-bit counter and hence requires two 32-bit reads to read the full value. The TSTMR
runs off the 1 MHz clock and resets on every system reset. The counter only stops when
the clock to the TSTMR is disabled.
For the chip-specific implementation details of this module's instances, see the chip
configuration chapter.
Chapter 50 Time Stamp Timer Module (TSTMR)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1289