NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1219 / 1379

Field Function
7
FOR_SCLK
Force System Clock. If set, the system clock is used to operate the TRNG, instead of the ring oscillator.
This is for test use only, and indeterminate results may occur. This bit is writable only if PRGM bit is 1, or
PRGM bit is being written to 1 simultaneously to writing this bit. This bit is cleared by writing the
RST_DEF bit to 1.
6
RST_DEF
Reset Defaults. Writing a 1 to this bit clears various TRNG registers, and bits within registers, to their
default state. This bit is writable only if PRGM bit is 1, or PRGM bit is being written to 1 simultaneously to
writing this bit. Reading this bit always produces a 0.
5
TRNG_ACC
TRNG Access Mode. If this bit is set to 1, the TRNG will generate an Entropy value that can be read via
the TRNG0_ENT0-TRNG0_ENT15 registers. The Entropy value may be read once the ENT VAL bit is
asserted. Also see TRNG0_ENTa register descriptions (For a = 0 to 15).
4
UNUSED
This bit is unused but write-able. Must be left as zero.
3-2
OSC_DIV
Oscillator Divide. Determines the amount of dividing done to the ring oscillator before it is used by the
TRNG.
This field is writable only if PRGM bit is 1, or PRGM bit is being written to 1 simultaneously to writing this
field. This field is cleared to the default POR value by writing the RST_DEF bit to 1.
00 - use ring oscillator with no divide
01 - use ring oscillator divided-by-2
10 - use ring oscillator divided-by-4
11 - use ring oscillator divided-by-8
1-0
SAMP_MODE
Sample Mode. Determines the method of sampling the ring oscillator while generating the Entropy value:
This field is writable only if PRGM bit is 1, or PRGM bit is being written to 1 simultaneously with writing
this field. This field is cleared to the POR default value by writing the RST_DEF bit to 1.
00 - use Von Neumann data into both Entropy shifter and Statistical Checker
01 - use raw data into both Entropy shifter and Statistical Checker
10 - use Von Neumann data into Entropy shifter. Use raw data into Statistical Checker
11 - undefined/reserved.
48.1.3.3.3 TRNG0 Statistical Check Miscellaneous (TRNG0_SCMISC)
48.1.3.3.3.1 Address
Register Offset
TRNG0_SCMISC 400A5004h
48.1.3.3.3.2 Function
The TRNG0 Statistical Check Miscellaneous Register contains the Long Run Maximum
Limit value and the Retry Count value. This register is accessible only when the
TRNG0_MCTL[PRGM] bit is 1, otherwise this register will read zeroes, and cannot be
written.
Chapter 48 SA-TRNG Standalone
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1219