NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1070 / 1379

SCG_SOSCCSR field descriptions (continued)
Field Description
25
SOSCSEL
System OSC Selected
0 System OSC is not the system clock source
1 System OSC is the system clock source
24
SOSCVLD
System OSC Valid
The SOSC is considered valid after 4096 xtal counts.
0 System OSC is not enabled or clock is not valid
1 System OSC is enabled and output clock is valid
23
LK
Lock Register
This bit field can be cleared/set at any time.
0 This Control Status Register can be written.
1 This Control Status Register cannot be written.
22–18
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
17
SOSCCMRE
System OSC Clock Monitor Reset Enable
0 Clock Monitor generates interrupt when error detected
1 Clock Monitor generates reset when error detected
16
SOSCCM
System OSC Clock Monitor
Enables the clock monitor when SOSCVLD is set. If the clock source is disabled in a low power mode then
the clock monitor is also disabled in the low power mode. The clock monitor is always disabled in LLS/
VLLS modes. When the clock monitor is disabled in a low power mode, it remains disabled until the clock
valid flag is set following exit from the low power mode.
0 System OSC Clock Monitor is disabled
1 System OSC Clock Monitor is enabled
15–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3
SOSCERCLKEN
System OSC 3V ERCLK Enable
SOSCERCLKEN is required for stop modes.
0 System OSC 3V ERCLK output clock is disabled.
1 System OSC 3V ERCLK output clock is enabled when SYSOSC is enabled.
2
SOSCLPEN
System OSC Low Power Enable
SOSCLPEN is required for low power modes. In VLPS mode (low power stop mode), if you want the clock
to remain ON, then both SOSCLPEN and SOSCSTEN bits must be enabled.
0 System OSC is disabled in VLP modes
1 System OSC is enabled in VLP modes
1
SOSCSTEN
System OSC Stop Enable
0 System OSC is disabled in Stop modes
1 System OSC is enabled in Stop modes if SOSCEN=1. In VLLS0, system oscillator is disabled even if
SOSCSTEN=1 and SOSCEN=1.
Table continues on the next page...
Memory Map/Register Definition
K32 L2A Reference Manual, Rev. 2, 01/2020
1070 NXP Semiconductors