NXP Semiconductors K22F series, Reference Manual, Page: 229 / 1407

10.4.1 Core Modules
Table 10-3. JTAG Signal Descriptions
Chip signal name Module signal
name
Description I/O
JTAG_TMS JTAG_TMS/
SWD_DIO
JTAG Test Mode Selection I
JTAG_TCLK JTAG_TCLK/
SWD_CLK
JTAG Test Clock I
JTAG_TDI JTAG_TDI JTAG Test Data Input I
JTAG_TDO JTAG_TDO/
TRACE_SWO
JTAG Test Data Output O
JTAG_TRST JTAG_TRST_b JTAG Reset I
Table 10-4. SWD Signal Descriptions
Chip signal name Module signal
name
Description I/O
SWD_DIO JTAG_TMS/
SWD_DIO
Serial Wire Data I
SWD_CLK JTAG_TCLK/
SWD_CLK
Serial Wire Clock I
Table 10-5. TPIU Signal Descriptions
Chip signal name Module signal
name
Description I/O
TRACE_SWO JTAG_TDO/
TRACE_SWO
Trace output data from the ARM CoreSight debug block over a
single pin O
10.4.2 System Modules
Table 10-6. EWM Signal Descriptions
Chip signal name Module signal
name
Description I/O
EWM_IN EWM_in EWM input for safety status of external safety circuits. The polarity
of EWM_in is programmable using the EWM_CTRL[ASSIN] bit. The
default polarity is active-low. I
EWM_OUT EWM_out EWM reset out signal O
Chapter 10 Signal Multiplexing and Signal Descriptions
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 229