NXP Semiconductors K22F series, Reference Manual, Page: 1224 / 1407

UART memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_C01C UART 7816 Wait N Register (UART2_WN7816) 8 R/W 00h
47.3.27/
1252
4006_C01D UART 7816 Wait FD Register (UART2_WF7816) 8 R/W 01h
47.3.28/
1253
4006_C01E UART 7816 Error Threshold Register (UART2_ET7816) 8 R/W 00h
47.3.29/
1253
4006_C01F UART 7816 Transmit Length Register (UART2_TL7816) 8 R/W 00h
47.3.30/
1254
4006_C03A
UART 7816 ATR Duration Timer Register A
(UART2_AP7816A_T0)
8 R/W 00h
47.3.31/
1254
4006_C03B
UART 7816 ATR Duration Timer Register B
(UART2_AP7816B_T0)
8 R/W 00h
47.3.32/
1255
4006_C03C
UART 7816 Wait Parameter Register A
(UART2_WP7816A_T0)
8 R/W 00h
47.3.33/
1256
4006_C03C
UART 7816 Wait Parameter Register A
(UART2_WP7816A_T1)
8 R/W 00h
47.3.34/
1256
4006_C03D
UART 7816 Wait Parameter Register B
(UART2_WP7816B_T0)
8 R/W 14h
47.3.35/
1257
4006_C03D
UART 7816 Wait Parameter Register B
(UART2_WP7816B_T1)
8 R/W 14h
47.3.36/
1257
4006_C03E
UART 7816 Wait and Guard Parameter Register
(UART2_WGP7816_T1)
8 R/W 06h
47.3.37/
1258
4006_C03F
UART 7816 Wait Parameter Register C
(UART2_WP7816C_T1)
8 R/W 0Bh
47.3.38/
1258
47.3.1 UART Baud Rate Registers: High (UARTx_BDH)
This register, along with the BDL register, controls the prescale divisor for UART baud
rate generation. To update the 13-bit baud rate setting (SBR[12:0]), first write to BDH to
buffer the high half of the new value and then write to BDL. The working value in BDH
does not change until BDL is written.
BDL is reset to a nonzero value, but after reset, the baud rate generator remains disabled
until the first time the receiver or transmitter is enabled, that is, when C2[RE] or C2[TE]
is set.
Address: Base a 0h offset
Bit 7 6 5 4 3 2 1 0
Read
LBKDIE RXEDGIE
0
SBR
Write
Reset 0 0 0 0 0 0 0 0
Memory map and registers
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1224 NXP Semiconductors