NXP Semiconductors K22F series, Reference Manual, Page: 1177 / 1407

Table 45-12. Baud rate values (bps) (continued)
Baud rate divider prescaler values
2 3 5 7
4096 12.2k 8.14k 4.88k 3.49k
8192 6.10k 4.07k 2.44k 1.74k
16384 3.05k 2.04k 1.22k 872
32768 1.53k 1.02k 610 436
45.5.5 Delay settings
The following table shows the values for the Delay after Transfer (t
DT
) and CS to SCK
Delay (T
CSC
) that can be generated based on the prescaler values and the scaler values set
in the CTARs. The values calculated assume a 100 MHz protocol frequency.
NOTE
The clock frequency mentioned above is given as an example in
this chapter. See the clocking chapter for the frequency used to
drive this module in the device.
Table 45-13. Delay values
Delay prescaler values
1 3 5 7
Delay scaler values
2 20.0 ns 60.0 ns 100.0 ns 140.0 ns
4 40.0 ns 120.0 ns 200.0 ns 280.0 ns
8 80.0 ns 240.0 ns 400.0 ns 560.0 ns
16 160.0 ns 480.0 ns 800.0 ns 1.1 μs
32 320.0 ns 960.0 ns 1.6 μs 2.2 μs
64 640.0 ns 1.9 μs 3.2 μs 4.5 μs
128 1.3 μs 3.8 μs 6.4 μs 9.0 μs
256 2.6 μs 7.7 μs 12.8 μs 17.9 μs
512 5.1 μs 15.4 μs 25.6 μs 35.8 μs
1024 10.2 μs 30.7 μs 51.2 μs 71.7 μs
2048 20.5 μs 61.4 μs 102.4 μs 143.4 μs
4096 41.0 μs 122.9 μs 204.8 μs 286.7 μs
8192 81.9 μs 245.8 μs 409.6 μs 573.4 μs
16384 163.8 μs 491.5 μs 819.2 μs 1.1 ms
32768 327.7 μs 983.0 μs 1.6 ms 2.3 ms
65536 655.4 μs 2.0 ms 3.3 ms 4.6 ms
Chapter 45 Serial Peripheral Interface (SPI)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1177