NXP Semiconductors i.MX 8M Plus LPDDR4 EVK, Hardware User'S Manual, Page: 14 / 20

Table 6. J21 pin definition (continued)
Num. Net name Description Num. Net name Description
25 GND Ground 26 — NC
27 — NC 28 — NC
29 EXP_ P1_5 Expansion IO signal 30 GND Ground
31 EXP_ P1_6 Expansion IO signal 32 PWM4_3V3 PWM signal
33 EXP_ P1_7 Expansion IO signal 34 GND Ground
35
PDM_STREAM_3 Level shifted SAI5 receive
data signal
36
PDM_STREAM_2 Level shifted SAI5 receive
data signal
37
PDM_STREAM_1 Level shifted SAI5 receive
data signal
38
PDM_STREAM_0 Level shifted SAI5 receive
data signal
39
GND Ground
40
PDM_CLK Level shifted SAI5 receive
clock signal
2.20 I2C connector (J22)
One 8-pin dual-row Pin Header connector (J22) is provided on the EVK board to support I
2
C connection. The developers can use
the port for some specific application development.
The connector is as shown in
Figure 2 .
Table 7. J22 pin definition
Num. Net name Description
1/2 VEXT_3V3 Power Output, 3.3 V
3/4 I2C5_SCL_3V3 I2C clock signal
5/6 I2C5_SDA_3V3 I2C data signal
7/8 GND Ground
2.21 Power Measurement Board connector (J25)
One 40-pin board-to-board connector (J25) is provided on the 8MPLUS-BB board to support Power Measurement Board
connection, which you can use to evaluate the power consumption of most of the power rails in different user cases.
The connector is as shown in
Figure 2 .
Table 8. J25 pin dDefinition
Num. Net name Description Num. Net name Description
1 VDD_5V Power Output, 5 V 2 GND Ground
3 VDD_5V Power Output, 5 V 4 GND Ground
5 VDD_5V Power Output, 5 V 6 GND Ground
Table continues on the next page...
NXP Semiconductors
Specifications
i.MX 8M Plus LPDDR4 EVK Board Hardware User's Guide, Rev. 0, March 9, 2021
User's Guide 14 / 20