NXP Semiconductors freescale semiconductor MC13211, Reference Manual

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Modem Miscellaneous Functions
MC1321x Reference Manual, Rev. 1.6
9-2 Freescale Semiconductor
9.2 General Purpose Input/Output
The MC1321x has seven (7) general purpose input/output (GPIO) pins (GPIO1 through GPIO7). Features
include:
• CMOS logic levels with +/- 1 mA load current
• Programmable as inputs or outputs
• During reset outputs are disabled and exit reset as inputs
• Not capable of generating an interrupt
• Once programmed as an output, a GPIO keeps its state if the transceiver transitions to Doze or
Hibernate Mode
9.2.1 Configuring GPIO Direction
The GPIO are configured using GPIO_Dir Register 0B. Each I/O has a gpiox_oen output enable bit and a
gpiox_ien input enable bit. Exiting reset, the default condition for these enable bits is that the gpiox_ien
bits are set to 1 which enables the pins as inputs and gpiox_oen are cleared.
NOTE
If any bit is programmed to be an input and output simultaneously, the input
condition overrides.
9.2.2 Setting GPIO Output Drive Strength
If any GPIO are programmed as outputs, their drive strength is programmable. GPIO1 through GPIO4 are
programmed as a group for drive strength by writing to control field gpio1234_drv[1:0], GPIO_Dir
Register 0B, and GPIO5 through GPIO7 are programmed as a group by writing to gpio567_drv[1:0],
GPIO_Data_Out Register 0C. There are 4 levels of drive strength with field value 00 for lowest and value
11 for greatest.
9.2.3 Programming GPIO Output Value
GPIO_Data_Out Register 0C has a gpiox_o bit for each GPIO pin that establishes the corresponding
output’s state when that I/O is programmed as an output. Setting a gpiox_o to 1 sets the output high.
9.2.4 Reading GPIO Input State
GPIO_Data_In Register 28 has a gpiox_i bit for each GPIO pin. When a GPIO is programmed as an input,
its state can be determined by reading the corresponding gpiox_i bit in the register.