Analog-to-Digital Converter (ADC12)
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
15-19
15.6
Application Information
This section contains information for using the ADC module in applications. The ADC has been designed
to be integrated into a microcontroller for use in embedded control applications requiring an A/D
converter.
15.6.1
External Pins and Routing
The following sections discuss the external pins associated with the ADC module and how they should be
used for best results.
15.6.1.1
Analog Supply Pins
The ADC module has analog power and ground supplies (V
DDAD
and V
SSAD
) available as separate pins
on some devices. V
SSAD
is shared on the same pin as the MCU digital V
SS
on some devices.
On other
devices, V
SSAD
and V
DDAD
are shared with the MCU digital supply pins. In these cases, there are separate
pads for the analog supplies bonded to the same pin as the corresponding digital supply so that some degree
of isolation between the supplies is maintained.
When available on a separate pin, V
DDAD
and V
SSAD
must be connected to the same voltage potential as
their corresponding MCU digital supply (V
DD
and V
SS
) and must be routed carefully for maximum noise
immunity and bypass capacitors placed as near as possible to the package.
If separate power supplies are used for analog and digital power, the ground connection between these
supplies must be at the V
SSAD
pin. This should be the only ground connection between these supplies if
possible. The V
SSAD
pin makes a good single point ground location.
15.6.1.2
Analog Reference Pins
In addition to the analog supplies, the ADC module has connections for two reference voltage inputs. The
high reference is V
REFH
, which may be shared on the same pin as V
DDAD
on some devices. The low
reference is V
REFL
, which may be shared on the same pin as V
SSAD
on some devices.
When available on a separate pin, V
REFH
may be connected to the same potential as V
DDAD
, or may be
driven by an external source between the minimum V
DDAD
spec and the V
DDAD
potential (V
REFH
must
never exceed V
DDAD
). When available on a separate pin, V
REFL
must be connected to the same voltage
potential as V
SSAD
. V
REFH
and V
REFL
must be routed carefully for maximum noise immunity and bypass
capacitors placed as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array at each successive
approximation step is drawn through the V
REFH
and V
REFL
loop. The best external component to meet this
current demand is a 0.1
μ
F capacitor with good high frequency characteristics. This capacitor is connected
between V
REFH
and V
REFL
and must be placed as near as possible to the package pins. Resistance in the
path is not recommended because the current causes a voltage drop that could result in conversion errors.
Inductance in this path must be minimum (parasitic only).
