Multipurpose Clock Generator (MCG)
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
6-27
Figure 6-11. Flowchart of BLPI to FEE Mode Transition using an 8 MHz crystal
6.5.4
Calibrating the Internal Reference Clock (IRC)
The IRC is calibrated by writing to the MCGTRM register first, then using the FTRIM bit to fine tune the
frequency. Refer to this total 9-bit value as the trim value, ranging from 0x000 to 0x1FF, where the FTRIM
bit is the LSB.
The trim value after reset is the factory trim value unless the device resets into any BDM mode in which
case it is 0x800. Writing a larger value decreases the frequency and smaller values increases the frequency.
The trim value is linear with the period, except that slight variations in wafer fab processing produce slight
non-linearities between trim value and period. These non-linearities are why an iterative trimming
MCGC2 = 0x36
CHECK
OSCINIT = 1 ?
MCGC1 = 0x18
CHECK
IREFST = 0?
CHECK
CLKST = %00?
CONTINUE
IN FEE MODE
START
I
N BLPI MODE
YES
YES
NO
NO
NO
MCGC2 = 0x00
OPTIONAL:
CHECK LOCK
= 1?
YES
NO
YES
OPTIONAL:
CHECK LOCK
= 1?
YES
NO
