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MCG_SC field descriptions (continued)
Field
Description
6
ATMS
Automatic Trim Machine Select
Selects the IRCS clock for Auto Trim Test.
0
32 kHz Internal Reference Clock selected.
1
4 MHz Internal Reference Clock selected.
5
ATMF
Automatic Trim Machine Fail Flag
Fail flag for the Automatic Trim Machine (ATM). This bit asserts when the Automatic Trim Machine is
enabled, ATME=1, and a write to the C1, C3, C4, and SC registers is detected or the MCG enters into any
Stop mode. A write to ATMF clears the flag.
0
Automatic Trim Machine completed normally.
1
Automatic Trim Machine failed.
4
FLTPRSRV
FLL Filter Preserve Enable
This bit will prevent the FLL filter values from resetting allowing the FLL output frequency to remain the
same during clock mode changes where the FLL/DCO output is still valid. (Note: This requires that the
FLL reference frequency to remain the same as what it was prior to the new clock mode switch. Otherwise
FLL filter and frequency values will change.)
0
FLL filter and FLL frequency will reset on changes to currect clock mode.
1
Fll filter and FLL frequency retain their previous values during new clock mode change.
3–1
FCRDIV
Fast Clock Internal Reference Divider
Selects the amount to divide down the fast internal reference clock. The resulting frequency will be in the
range 31.25 kHz to 4 MHz (Note: Changing the divider when the Fast IRC is enabled is not supported).
000
Divide Factor is 1
001
Divide Factor is 2.
010
Divide Factor is 4.
011
Divide Factor is 8.
100
Divide Factor is 16
101
Divide Factor is 32
110
Divide Factor is 64
111
Divide Factor is 128.
0
LOCS0
OSC0 Loss of Clock Status
The LOCS0 indicates when a loss of OSC0 reference clock has occurred. The LOCS0 bit only has an
effect when CME0 is set. This bit is cleared by writing a logic 1 to it when set.
0
Loss of OSC0 has not occurred.
1
Loss of OSC0 has occurred.
Chapter 30 Multipurpose Clock Generator (MCG)
KV4x Reference Manual, Rev. 2, 02/2015
Freescale Semiconductor, Inc.
Preliminary
559
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