NXP Semiconductors FRDMDUALK3664EVB, User Manual, Page: 9 / 17

NXP Semiconductors
UM11826
FRDMDUALK3664EVB evaluation board
6.2.2.1.1 TPL bus selection
The FRDMDUALK3664EVB provides an option to select dynamically which TPL bus is
addressed. Using three signals it is possible to transmit individually on the TPL1 or TPL2
bus, or to transmit simultaneously on both TPL1 and TPL2 bus.
Note:
For proper operation, the logic circuitry expects the unused CSB signals to be
HIGH.
aaa-047529
C17
0.1 F
VIO
VIO
1
2
5
6
7
8 VCC
TPL1TXCSB664
U1A
74LVC2G08GT
U1B
74LVC2G08GT
R29
CRCW040211K0FKED
DNP
R36
CRCW040211K0FKED
DNP
4
GND
TXCSB1
3
TPL2TXCSB664
TXCSB2
GND
GND
CSB0
R53
4.7 k
VIO
CSB2
R54
4.7 k
VIO
CSB1
R55
4.7 k
Figure 5. TPL chain selection
Selected CSB line (active LOW) Selected TPL line (active LOW)
CSB0 TPL1
CSB1 TPL2
CSB2 TPL1 and TPL2
Table 6. TPL bus selection
6.2.2.2 MCU interface connectors
The connectors K1 to K6 enable interface to an NXP microcontroller development
platform. The mechanical dimensions and pinout are selected to fit the
S32K3x4EVB ‑ Q172 (recommended hardware platform).
Note: Connectors differ in number of rows. Only inner rows are used for easier stacking
and unstacking.
Table 7 details the signals used for the S32K3x4EVB-Q172 evaluation boards.
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User manual Rev. 1 — 6 September 2022
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