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NXP Semiconductors
UM11826
FRDMDUALK3664EVB evaluation board
6.2.2.3 Logic analyzer interface connectors J3, J4, J5
These connectors are intended for software development and debugging purposes. They
allow easy access to used signals and to monitor them, for instance, with a logic analyzer
or an oscilloscope.
Pin
Signal
Description
1
GND
ground
2
TPL1RXCSB
TPL1 RX chip select
3
GND
ground
4
TPL1RXDATA
TPL1 RX data
5
GND
ground
6
TPL1RXCLK
TPL1 RX clock
7
GND
ground
8
TPL1EN
TPL1 enable
Table 8. Connector J3
Pin
Signal
Description
1
GND
ground
2
TPL2RXCSB
TPL2 RX chip select
3
GND
ground
4
TPL2RXDATA
TPL2 RX data
5
GND
ground
6
TPL2RXCLK
TPL2 RX clock
7
GND
ground
8
TPL2EN
TPL2 enable
Table 9. Connector J4
Pin
Signal
Description
1
GND
ground
2
TPL1INTB
TPL1 interrupt
3
GND
ground
4
TPL2INTB
TPL2 interrupt
5
GND
ground
6
Debug1
optional debug signal
7
GND
ground
8
Debug2
optional debug signal
Table 10. Connector J5
UM11826
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User manual
Rev. 1 — 6 September 2022
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