NXP Semiconductors DSP56800E, User Manual

Page: 48 / 79

located as shown in Figure 2-9 . The variables t
1
, t
2
, and t
3
, which represent the switching
duty-cycle ratios of the respective three-phase system, are calculated according to the
following equations:
Equation 42
where T is the switching period, and t_1 and t_2 are the duty-cycle ratios of the basic
space vectors given for the respective sector;
Table 2-10 , Equation 31 on page 38 , and
Equation 42 on page 48 are specific solely to the standard space vector modulation
technique; other space vector modulation techniques discussed later will require deriving
different equations.
The next step is to assign the correct duty-cycle ratios - t
1
, t
2
, and t
3
, to the respective
motor phases. This is a simple task, accomplished in a view of the position of the stator
reference voltage vector; see
Table 4 .
Table 2-11. Assignment of the duty-cycle ratios to motor phases
Sectors U
0
, U
60
U
60
, U
120
U
120
, U
180
U
180
, U
240
U
240
, U
300
U
300
, U
0
pwm_a t
3
t
2
t
1
t
1
t
2
t
3
pwm_b t
2
t
3
t
3
t
2
t
1
t
1
pwm_c t
1
t
1
t
2
t
3
t
3
t
2
The principle of the space vector modulation technique consists of applying the basic
voltage vectors U
XXX
and O
XXX
for certain time, in such a way that the main vector
generated by the pulse width modulation approach for the period T is equal to the original
stator reference voltage vector U
S
. This provides a great variability of arrangement of the
basic vectors during the PWM period T. These vectors might be arranged either to lower
the switching losses, or to achieve diverse results, such as center-aligned PWM, edge-
aligned PWM, or a minimal number of switching states. A brief discussion of the widely
used center-aligned PWM follows.
Generating the center-aligned PWM pattern is accomplished by comparing the threshold
levels pwm_a, pwm_b, and pwm_c with a free-running up-down counter. The timer
counts to one, and then down to zero. It is supposed that when a threshold level is larger
than the timer value, the respective PWM output is active. Otherwise, it is inactive; see
Figure 2-14 .
GMCLIB_SvmStd
GMCLIB User's Guide, Rev. 2, 10/2015
48 Freescale Semiconductor, Inc.