Figure 16. The pin of RT1064 chip
Figure 17. The pin of CAN BUS chip
5 Introduction to other EVK board of i.MX RT series
For the boundary scan test, follow steps as below:
• RT1010-EVK board
1. Change to JTAG mode by burning eFuse.
2. Check the BSDL file to confirm the status of three pins in COMPLIANCE_PATTERN, as shown below:
(TEST_MODE, GPIO_AD_11, POR_B) (011)
Similar to RT1060-EVK, remove the pull-down resistor, R303, of the
JTAG_MOD
pin and connect it to the
DCDC_3V3
power supply.
3. Ensure independent JTAG topology, avoid level interference of other multiplexed signals, and disconnect the
headers, J61, J62, J63, and J64.
4. Use the Lauterbach debugger to test. For details, see the introduction above.
• RT1020 includes two package types, LQFP144 and LQFP100, corresponding to two boards, RT1020-EVK and RT1020-
EVK100.
— RT1020-EVK board (LQFP144)
NXP Semiconductors
Introduction to other EVK board of i.MX RT series
Introduction to Boundary Scan of i.MX RT Series, Rev. 1, March 2, 2021
Application Note
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