
AN10881
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Application note
Rev. 2 — 26 September 2011
66 of 102
NXP Semiconductors
AN10881
TEA1713 resonant power supply control IC with PFC
9.5 Choice of burst level and hysteresis level
Set the power levels for bursting using an external comparator for dimensioning the Burst
mode.
shows a typical comparator circuit with hysteresis.
The basic choice for the voltage level at which the comparator must be active (BURST)
can be made experimentally.
It is important to realize that the input voltage of the resonant converter V
boost
(see
) influences the relationship between the HBC output power level and the
SNSFB regulation voltage.
Fig 43. Remaining 90 W adapter losses in Burst mode
Fig 44. Simultaneous HBC and PFC Burst mode operation (including output voltage
ripple)
Pout (W)
0
1.0
0.8
0.4
0.6
0.2
001aal053
1.0
1.5
0.5
2.0
2.5
Pin
(W)
0
mains = 230 VAC
mains = 100 VAC
001aal054
V
DRAIN.PFC
[100 V/div]
V
OUTPUT
[100 mV/div]
HB [100 V/div]