M451
May. 4, 2018
Page
460
of
1006
Rev.2.08
M4
51
S
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RI
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CH
NICA
L RE
F
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NC
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M
A
NU
A
L
CNT
Edge Detect
Brake Source
PWM_CH0
PWM_CH0 signals resume at next start
of PWM period after BRKEIF0 clear
BRKEIF1
BRKEIF0
s/w clear
BRKESTS0
BRKESTS1
s/w clear
PWM_CH1
PWM_CH1 signals resume at next start
of PWM period after BRKEIF1 clear
Note:
Output Brake State
Setting: BRKAEVEN = 3 (High)
BRKAODD = 2 (Low)
Figure 6.9-31 Edge Detector Waveform for PWM_CH0 and PWM_CH1 Pair
CNT
Level Detect
Brake Source
PWM_CH0
BRKLIF1
BRKLIF0
s/w clear
BRKLSTS0
BRKLSTS1
s/w clear
PWM_CH1
No matter BRKLIF0 or BRKLIF1 clear or not, while no brake
event occur, brake state resume at next start of PWM period
Note:
Output Brake State
Setting: BRKAEVEN = 3 (High)
BRKAODD = 2 (Low)
Figure 6.9-32 Level Detector Waveform for PWM_CH0 and PWM_CH1 Pair
The two kinds of detectors detect the same five brake sources: two from external input signals,
two from analog comparators and one from system fail but with different brake sources enable. In
addition to the five sources, the level detector has one more brake condition triggerred by
software, in M45xD/M45xC edge detector also has software trigger condition, as shown in Figure
