— 7-12 —
B
B
3
3
t
t
y
y
p
p
e
e
B
B
5
5
t
t
y
y
p
p
e
e
7.1. General operation and Function
7.1.9. Alarm (DRDY and OVER) Output
2
2
3
3
t
t
y
y
p
p
e
e
2
2
5
5
t
t
y
y
p
p
e
e
7.1.9. Alarm Output (DRDY and OVER)
l
Following completion of initialization of the CPU after the power is on, the DRDY output closes
and the OVER output opens if the Driver Unit is in normal state.
l
When an alarm arises, the status of the DRDY and the OVER outputs will change. Way of
change depends on the contents of alarm. (Refer to “10. Alarm.”)
l
Connect alarm signals to the alarm input ports of the master controller.
Figure 7-11:
Alarm arises.
Closed
Open
On
Off
Power
DRDY output
OVER output
CPU initializing time
(Approximately 2 sec.)
Closed
Open
l
In case of the B3 and the 23 Driver Unit, the BF and the OM parameters set an output among
OVER, BRK/BRKC, NEARA, and SPD to OUT1 output.
l
The OUT1 output will be set as the OVER output by the setting of BF0 and OM3 parameters if
the I/O combination type is TY8.
l
The OUT1 output will be set as the OVER output by the setting of OM3 parameter if the I/O
combination type is other than TY8.