NR Electric PCS-9611, Instruction Manual

Page: 84 / 300

3 Operation Theory
PCS-9611 Feeder Relay
3-48
Date: 2014-04-08
3 59G1.En
The logic setting of the stage 1 zero sequence
overvoltage protection
0~1 1
4 59G1.OutMap
The output matrix setting of the stage 1 zero
sequence overvoltage protection
0x00000 ~
0xFFFFF
1
5 59G2.3U0_Set
The voltage setting of the stage 2 zero sequence
overvoltage protection
2~160V 0.001V
6 59G2.t_Op
The time s etting of the stage 2 zero sequence
overvoltage protection
0~100s 0.001s
7 59G2.En
The logic setting of the stage 2 zero sequence
overvoltage protection
0~1 1
8 59G2.OutMap
The output matrix setting of the stage 2 zero
sequence overvoltage protection
0x00000 ~
0xFFFFF
1
3.15 Negative Sequence Overvoltage Protection
3.15.1 Negative Sequence Overvoltage Protection Theory
On a healthy three-phase power system, the negative sequence voltage is nominally zero.
However, when an unbalance situation occurs on the primary system, the negative sequence
voltage is produced.
This relay provides a one-stage negative sequence overvoltage protection with definite time delay
characteristic. The negative sequence voltage is self-calculated.
The following figure shows the logic diagram of the negative sequence overvoltage protection.
[59Q.En1]
[59Q.En]
U
2
> [59Q.U2_Set]
&
[59Q.Op]
[59Q.St]
[59Q.Blk]
t
NOV
0
Figure 3.15-1 Logic diagram of the NOV protection
Where:
[59Q.U2_Set] is the voltage setting of the negative sequence overvoltage protection;
“t
NOV
” is the setting [59Q.t_Op], the time setting of the negative sequence overvoltage
protection;
[59Q.En] is logic setting of the negative sequence overvoltage protection.
[59Q.En1] is the binary signal for enabling the negative sequence overvoltage protection;
[59Q.Blk] is the binary signal for blocking the negative sequence overvoltage protection.
3.15.2 Negative Sequence Overvoltage Protection Settings
All the settings of the negative sequence overvoltage protection are listed in the following table.