NOVA electronics Inc. MCX514 -
158
－
158
－
4.2.3 Notes on Using I2C Serial Bus
•
When writing to WR0 register, the high byte (H) must be written first, followed by the low byte (L). The user cannot
write 2 bytes continuously. It is necessary to set and write each slave address individually. If the low byte is written,
the command is executed immediately to the axis prior specified.
•
When reading data, as for ACK signal at reading of the last data, the CPU must return Hi level of ACK signal on the
SDA line. If returns Low level, this IC cannot terminate communication correctly.
•
When using interrupt related to INT0N signal, the user cannot read RR0H. If reads RR0H, the interrupt related to
INT0N signal may be cleared. If the user needs to read RR0H when using interrupt, please contact us.
•
When reading RR1 register, be sure to read 2 bytes (RR1L, RR1H) from RR1L. If reads only 1 byte of RR1L, the
interrupt of RR1H may be cleared.
•
Repeat start condition is not available.
4.2.4 Connection Example
The connection example of this IC with CPU is as follows.
Host CPU
MCX514
A0
A1
A2
BUSMOD
SCL
SDA
Example of Chip address
：
100
SCL
SDA
D15-D8
WRN
RDN
A3
Port Output
I2CRSTN
+3.3V
3.3K
3.3K
D7-D0
27
28
1-8
11-18
21
26
25
31
22
23
24
32
+3.3V
+3.3V
１
２
３
４
５
①
Fix BUSMOD to GND, and set I
2
C bus mode.
②
Determine chip address by A2, A1, A0 signals.
③
Fix parallel bus signal (floating input) to GND or VCC.
④
Connect I2CRSTN as necessary, which is not needed unless noise is occurred on the SCL, SDA line from the CPU side at
initial setting.
⑤
Pull-up resistors are essential on the SCL, SDA lines.
