DETAILED DESCRIPTION
2-16
Block Diagram:
Figure 2-4 OS1221B block diagram.
Block Description:
The RF signal is generated by a voltage controlled oscillator (VCO) built around a Dual Gate
Mosfet Transistor, chosen because of its good noise properties, and the possibility to have an
isolated output at the drain.
A part of the signal is fed back, via a buffer for isolation, to a divide by 64, modulus 2 pres-
caler. This is connected to a MC145152-2, a phase locked loop circuit that performs the
counting and control of the prescaler. The total count, and thereby the frequency, is set by
inserting shunts onto an array of pins.
The correct count for a desired frequency (FRQ) is found as follows:
CHANNEL
SELECT COU
PROGRAMABLE
DIVIDER
RF
OSCILLATOR
PHASE
DETECTOR
LOWPASS
FILTER
VCO
LOCK
DETECT
WINDOW
COMP.
BANDPASS
FILTER
12 dB
OSC_C
64
MODULUS 2
DIVIDER
COU Tx ON/OFF
X-TAL
FREQ.
TEST
POINT
FREQUENCY
ADJUST
MODULUS SELECT
LOCK DETECT TO IIC BUS
SCHM.TR
LATCH
SCHM.TR
LOCK DETECT TO IIC BUS
LOCK DETECT TO IIC BUS
CHANNEL
SELECT COU
PROGRAMABLE
DIVIDER
RF
OSCILLATOR
PHASE
DETECTOR
LOWPASS
FILTER
VCO
LOCK
DETECT
WINDOW
COMP.
BANDPASS
FILTER
12 dB
OSC_C
64
MODULUS 2
DIVIDER
MODULUS SELECT
LOCK DETECT TO IIC BUS
SCHM.TR
LATCH
SCHM.TR
LOCK DETECT TO IIC BUS
LOCK DETECT TO IIC BUS
CLR Tx ON/OFF
HBK587-3
