The Front end chip provides low noise power amplification, power detection and RF switching functions. It
also provides an extra RF port, so that Bluetooth can operate and share the antenna with WLAN.
The baseband processor includes the direct conversion radio stage and MAC. The radio is responsible for the
modulation and demodulation of data and scrambling/encoding of data according to information supplied
by the MAC. The power management IC provides power to the baseband processor and FE. It incorporates an
SMPS and linear regulators allowing the WLAN to operate directly from the cellular phone battery.
The WLAN SW is downloaded from the host engine when the WLAN is turned on, over the dedicated SPI
interface.
The 38.4 MHz reference clock from the host engine is shared with other radio technologies (e.g. Bluetooth)
and WLAN uses the clock request signal to request the reference clock to be turned on when WLAN needs to
use it.
Block diagram and interface signals
The following block diagram shows how the Wlan Size is connected to the Host side:
Figure 60 Block diagram
Table 15 Interface signals
SiModule
pin
In/Out
Function
COMMS
SPI_SDI
IN
SPI data from Host to WLAN module.
Master out Slave in, MOSI. Sampled on the rising edge
of the SPI Clock.
RM-356
System Module and User Interface
Issue 1
COMPANY CONFIDENTIAL
Page 6 –19
Copyright © 2008 Nokia. All rights reserved.
