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RSP Architecture
Vector Unit Registers
The RSP Vector Unit has 32 general-purpose vector registers, each 128 bits
wide.
Depending on the operation, vector registers can be accessed as a single unit,
by bytes, or by 16-bit elements corresponding to a vector slice.
VU Register Format
The RSP has big-endian byte ordering.
Figure 2-3
VU Register Format
Bits within a byte or register element are numbered similarly, little-endian.
VU Register Addressing
VU registers can be accessed in a variety of formats, depending on the
instruction being executed.
Computational Instructions
Most computational instructions operate on VU registers as vectors,
performing the same operation on 8 16-bit vector elements, on an
element-by-element basis, with the 8 elements corresponding to the vector
slices.
127
0
byte 0 byte 1 byte 2 byte 3 byte 4 byte 5 byte 6 byte 7 byte 8 byte 9 byte 10 byte 11 byte 12 byte 13 byte 14 byte 15
element 0
element 1
element 2
element 3
element 4
element 5
element 6
element 7
Summary of Contents for Ultra64
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Page 12: ...12 Figure 6 2 buildtask Operation 137 ...
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Page 80: ...80 Vector Unit Instructions vmadm dres_int dres_int vconst 3 vmadn dres_frac vconst vconst 0 ...
Page 104: ...104 RSP Coprocessor 0 ...
Page 150: ...150 Advanced Information ...
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Page 248: ...248 Exceptions None ...
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