Nidec Digitax ST Indexer, User Manual, Page: 44 / 132

44
SM-Applications Modules & Motion Processors User Guide
Issue Number: 4
5.5 Menu 85 - Timer Function Parameters

A hardware/counter is built into the Second Processor which has the following features:
•
A 16 bit incremental counter.
• Count rate selectable from the internal clock. The clock rate divisor is selectable
from rate/ 1, rate/ 4, rate/ 16, rate/ 64.
• Count rate selectable from an external clock via the DIGIN1 digital input. The
maximum clock rate is 600kHz.
• The timer can be used to schedule one of the 4 DPL Event tasks on wrap-around or
an input capture on DIGIN1.
• Counter overflow can be selected by the user up to the full 16 bit range avilable for
the counter.
• The timer can be set to cache the count on a DIGIN0 rising or falling edge transition.
Figure 5-1 Timer Logic Diagram
Apps Apps Lite Apps Plus Lite V2 ST Plus ST Indexer
     
Pr 85.01 Timer Unit Control Word
Access RW Range 13 bit
Default N/A Update Rate Immediate
Table 5-3 Control Word - Pr 85.01
Bit Symbol Function
b0-b2 TE
Timer EVENT task schedule when the TI flag is set:
0=No Event task scheduled
1=Schedule Event task
2=Schedule Event1 task
3=Schedule Event2 task
4=Schedule Event3 task
b3 EN
Enable Timer:
0=Timer is disabled
1=Timer is enabled
C ontrol
28.7M H z
7.2M H z
1.8M H z
459kH z
& & 16bit counter T I
T im er
D igIn(1)
D igIn(0)
T E
E N
C
M