NI PXIe-1082DC, User Manual

Page: 63 / 66

© National Instruments | I-1
Index
B
backplane
hybrid peripheral slots, 1-6
interoperability with CompactPCI, 1-5
overview, 1-5
PXI Express peripheral slots, 1-6
PXI local bus, routing, 1-8
PXIe_SYNC_CTRL, 1-11
specifications, A-6
system controller slot, 1-6
system reference clock, 1-9
default behavior (figure), 1-10
system timing slot, 1-7
trigger bus, 1-9
C
CE compliance, specifications, A-5
chassis ambient temperature definitions, 2-3
chassis cooling considerations
ambient temperature definitions, 2-3
clearances, 2-2
figure, 2-2
vents (figure), 2-3
chassis initialization file, 2-12
chassis ventilation (figure), 2-3
clearances for chassis cooling, 2-2
figure, 2-2
CLK10 rear connectors, 2-10
CompactPCI, interoperability with NI
PXIe-1082DC backplane, 1-5
configuration in MAX (figure), 2-11
configuration.
See installation, configuration,
and operation
connector pinouts. See pinouts
cooling setting fan speed, 2-3
D
DB-9 connector
pinout (table), 2-8
power supply voltages (table), 2-9
dimensions (figure), A-9, A-10
documentation related documentation,
ix
E
electromagnetic compatibility, A-5
environmental management, specifications
WEEE information, A-6
external clock source specifications, A-7
F
fan, setting speed, 2-3
G
ground, connecting, 2-4
H
hybrid peripheral slots, description, 1-6
hybrid slot pinouts
P1 connector (table), B-6
XP3 connector (table), B-7
XP4 connector (table), B-8
I
IEC 320 inlet, 1-4, 2-4
inhibit mode switch, 2-10
installation, configuration, and operation
chassis initialization file, 2-12
configuration in MAX (figure), 2-11
connecting safety ground, 2-4
installing a PXI Express system
controller, 2-4
figure, 2-5
module installation
CompactPCI or PXI modules
(figure), 2-7
peripheral module installation, 2-6
figure, 2-7
PXI Express configuration in
MAX, 2-10