NF FRA5022, Instruction Manual

Page: 112 / 145

5.6 Status System
FRA5022
5-34
5.6.2 Status Byte
The status byte register definitions are shown in table 5-3. Each status byte register bit
becomes valid when the corresponding service request enable register bit is set to 1. When
at least one such bit is set to 1, a service request is generated. It is possible to readout the
status byte with a serial poll or a *STB? query.
Table 5-3 Status byte register definitions
Bit Weight Condition to set to 1 Condition to set to 0
OPE 7 128 When any valid bit of the
operation event register is set to
1. When all of the valid bits of the
operation event register are set
to 0.
RQS
/
MSS
6 64 When SRQ is sent RQS: When SRQ is cleared by a
serial poll, etc.
MSS: When all of the source
summary bits are cleared
to 0.
ESB 5 32 When any valid bit of the
standard event status register is
set to 1. When all the valid bits of the
standard event status register
are set to 0.
MAV 4 16 When the response to the query
is ready to be output. When all of the responses have
been output and there remains
none to be output.
QUE 3 8
－
Always at 0 (unused)
－
2 4
－
Always at 0 (unused)
－
1 2
－
Always at 0 (unused)
OVE 0 1 When any valid bit of the
overload event register is set to
1. When all of the valid bits of the
overload event register are set
to 0.
■
About verifying status when querying
Normally, once a query command is sent, all you have to do is wait for the response
message. There is no need to check the MAV bit of the status byte.
■
Related commands/queries
*
STB?
Queries the contents of the status byte.
Bit 6 of the response is MSS (Master Summary Status).
Bit 6 of the serial poll is RQS (Request Service).
*
SRE /
*
SRE?
Sets/queries the service request enable register.
Set to 0 to clear the enable register to 0.
Cannot be cleared by any other commnad.
Cleared to 0 upon powering on.
The parameter value of the setting message or response message to each register is
the sum of the weight of all the bits having 1 as the value.