NF DP060LM, Instruction Manual, Page: 196 / 307

4. Advanced Operation
PROGRAMMABLE AC POWER SOURCE 178
Table 4-13 CONTROL I/O Pin Assignment
pin I/O Function Remarks
1 Output Power On/Off Low: Off, High: On
2 Output Output On/Off*
Low: On, High: Off (Negative)
Low: Off, High: On (Positive)
3 Output Protection operation*
Low: Active, High: None (Negative)
Low: None, High: Active (Positive)
4 Output Limiter operation*
Low: Active, High: None (Negative)
Low: None, High: Active (Positive)
5 Output AGC/Autocal setting state*
Low: On, High: Off (Negative)
Low: Off, High: On (Positive)
6 Output Software busy*
Low: Busy, High: Ready (Negative)
Low: Ready, High: Busy (Positive)
7 Output Output range Low: 200 V, High: 100V
8 Output — Unused
9 Output Step sync code 1 (bit 0)
High level or Low level
(see Table 4-14)
10 Output Step sync code 2 (bit 1)
11 Output Trigger
Positive or Negative
12 Output — Unused
13 Input Output Off Falling Off
14 Input Output On Falling On
15 Input Sequence start/resume Falling Start
16 Input Stop of sequence Falling Stop
17 Input Sequence is in the Hold status Falling Hold
18 Input Sequence branch 1 Falling Branch start
19 Input Sequence branch 2 Falling Branch start
20 Input Memory recall (+ compile) Falling Recall
21 Input Memory specification 1
Specify 0 to 3
(See Table 4-15, equivalent to memory 1
to 4, respectively)
22 Input Memory specification 2
23 Input Clear the current peak-hold value Falling Clear
24 — GND —
25 Reserved Do not connect anything Do not connect anything
Note 1: The polarity of state output marked with asterisk (*) can be switched.
Note 2: At 25th pin, +5 V is output for test in manufacturing, and the pin is not assumed to be used
by user. Do not connect this pin to anything, or this product might become unstable.
Table 4-14 Step Sync Code
Step sync code
bit LL LH HL HH
0 Low High Low High
1 Low Low High High
Table 4-15 Memory Specification
Memory No.
1 2 3 4
Specify 0 1 2 3
Memory specification 1 Low High Low High
Memory specification 2 Low
Low High High