NEC PC-8201 Service Manual Download Page 1

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Summary of Contents for PC-8201

Page 1: ...Per oncll Computer I Service Manual I NEC NEC Corporation ...

Page 3: ...3 13 3 1 1 1 Interrupt Functions 3 14 3 1 12 110 Address 3 15 3 2 Physical Specifications 3 21 3 2 1 Signal Lines 3 21 3 2 2 Power Supply 3 29 3 2 3 Structure and Size 3 30 3 3 Interface to Other Hardware 3 30 3 4 Software Interface 3 30 3 5 Human Interface 3 30 3 6 Performance Specification for the PC 8201 3 33 3 7 Accessories 3 33 CHAPTER 4 DISASSEMBLY REASSEMBLY 4 1 Disassembly 4 1 4 1 1 PC 820...

Page 4: ...Printer Interface Operation Test 5 3 7 Audio Cassette Interface Operation Test 5 3 8 110 Port Operation Test 5 3 9 Speaker Operation Test 5 3 10 Keyboard Operation Test CI IAPTER 6 TROUBLESHOOTING 6 1 Troubleshooting Flowchart 6 2 CPU Peripheral Circuit 6 2 1 PC 8301 Abnormal Power Supply 6 3 2 PC 8201 Abnormal Reset 6 2 3 PC 820 1 Abnormal CPU 80C85 6 2 4 Abnornial CPU Clock 6 2 5 Abnorn alCalend...

Page 5: ...ry Equipment APX B I R 2 ICs on Printed Circuit Board APX B I B 3 ICs with Sockets APX B 2 B 4 Drawings of Insertion and Removal of IC APX B 2 APPENDIX C PARTS LIST APPENDIX D CIRCUlT DlAGRAM APPENDIX E LSI DATA SI IEET iii I iv blank ...

Page 6: ... Four type A 4 Alkaline manganese batteries 4 5 days At four l ours day 18 days At one hour day Note With 110 disconnected Battery cassette 70 W x 80 5 D x 19 H mm Power OFF Man al power off It is possible to command in BASIC Variable minutes one to twenty five min utes Low voltage display Light a LED Operate for more than twenty minutes after lighting the LED d Memary Protection Battery On main P...

Page 7: ...ndard 32K bytes Option 32K bytes connect a 1C socket Standard 16K bytes Option 16K bytes connect a IC socket Option 32K bytes connect a IC socket Option 32K bytes connect a RAM cartridge 2 4 MHz Front 300 W x 215 D x 35 11 mm Back 300 W x 215 D x 6 l 1 I mm 6 7 or 8 bits Non EVEN or ODD 1 or 2 bit 75 110 300 600 1200 2400 4800 9600 19200 BPS 3 mMin 8 bit 19200 Non 1 or 2 bit 3 mMin 8 bits 19200 No...

Page 8: ...discharge of the Ni Cd battery for RAhl back up The I C 8301A will not operate regardless of the setting of the power switch unless this switch is ON Set this switch to OFF position if the PC 8201 is not to be used for a long timc Nole that the RAkl will not be backed up when this switch is set to llle OFF position 3 RESET Switch If the PC 8201 locks up the display will freeze and all keys seem to...

Page 9: ...CHAPTER 2 EXTERNAL VIEW Contrast mntrol Power mLtch 1 Front Back Left Side 2 1 2 2 blank Rear View ...

Page 10: ... Rob1 area is equipped with an IC socket which can be equipped with CbIOS Kohl I 3 1 3 RAM 1 Available RAM Thc eight 2li byte CMOS 1Cs arc used as RAM The system comes with l6K bytes STDRAM 2 Optional RAhl The PC 8201 is equipped with IC sockets for twenty four 3K byte CMOS ICs 48K bytes The first 16K bytes of this area are combined with the standard 16K byte RAM to make a 32K byte RAhI area The r...

Page 11: ...r 8000 to FFFF by software control Mernory is controlled at the following 110 port OUT A1 H LADR 2 HADR HADR 2 LADR 1 HADR 2 1 2 1 HADR 1 SELECT ADDRESS OH to 7FFFH LADR BANK 9 0 ROM 0 BANK 1 ROM I BANK 2 RAM 2 BANK 3 RAM if3 LADR SELECT ADDRESS 8000H to FFFFH STANDARD ROM NOT USED BANK 2 RAM 2 BANK 3 RAM 2 ...

Page 12: ... Number of display characters 40 characters x 8 rows Display duty is 1132s 2 Configuration of character Both alphanumeric characters and graphic charactors can be displayed 3 LCD I O address I O port Writing the command to LCD Reading the status from LCD Display On Off The LCD is divided into the following IC blocks Each block can be displayed separately I I 240 dots OUT FO DISP DISPLAY ...

Page 13: ...5 OUT 09 OUT BA B1 corresponds to I AO and B2 corresponds to PAI etc B10 corresponds to PB 1 A1 in each I O port selects the corresponding LCD block and is deselected by a 0 Address Set OUT FO Bit 7 Bit 6 0 0 PAGE 0 0 1 PAGE 1 1 0 PAGE 2 1 1 PAGE 3 BIT 5 TO BIT 0 0 to 49 displayed by binary number ...

Page 14: ...AGE 0 PAGE 1 PAGE 2 PAGE 3 Set of starting page OUT F O Bit 7 Bit 6 Order of displayed page One thityseconds duty 0 0 0 1 2 3 0 1 1 2 3 0 1 0 3 1 0 1 1 3 0 1 2 Select address counter count up or count down OUT FO 0 0 0 1 1 1 0 1 DOWN UP DO irN SELECT THE ADDRESS COUNTER 0 Down counter 1 Up counter ...

Page 15: ... BUSY in Bit 7 is 1 BIT 5 DISPLAY ONIOFF 0 Display Off 1 Display On RESET 9 DOWN 13I T 6 TYPE OF ADDRESS COUNTER O OFF Down counter Up counter BIT 7 OPERATE THE COMMAND 0 Nor nal 1 Operate IN F1 OUT FO and OUT F 1 command Write or Read Display Data BIT 7 131T 0 Displayed data This operates access with the RAM whose address has already been selected After then the address counter is counted up or c...

Page 16: ...ed to Port A at 81 55 and control signal from printer is transmitted to Port C Data transfer to printer OUT 69 BIT 7 BIT 0 Printer data port 7 6 5 4 3 2 1 0 BUSY SLCT signal from printer PD7 SLCT I BUSY 0 1 PD6 BUSY Strobe printer PDZ SLCT Deselect Select PD5 I Printer READY Printer BUSY PDI OUT 90 PDO PD4 5 PSTB PD3 PSTB STROBE PRINTER 0 Strobe Off 1 Strobe On ...

Page 17: ...ws the 110 port Command data output port OUT 09 C2 C1 CO Conlnland output port COO CCK SHIFT CLOCK 0 Clock Off 1 Clock On CDO Data output port CCK The first value is 05H Command Strobe to the Clock C2 OUT 90 TSTB C1 TSTB COMMAND STROBE TO CLOCK 0 Strobe Off 1 Strobe On C O Data from Clock CDI CLOCK DATA INPUT PORT 3 8 ...

Page 18: ... at 81C55 and senses the depressed key by IN E8 Keyboard Interface Port I 1 0 1 1 1 1 0 0 1 OUT B9 I OUT BA PA7 PA0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 PB7 PBO 0 0 0 0 0 0 0 1 CAPS SHIFT Key L z K A I Q A 0 8 1 PAST 9 INS DEL BS STOP I ...

Page 19: ...32C 7 6 Load to USART and control register SEL A OUT D8 SEL B CLS2 CLSl PI EPE SBS SBS 0 1 EPE 0 1 CLS 2 CLS 1 0 0 0 1 1 0 I 1 STOP BIT SELECT Stop bit length 1 bit If the length of data is 5 bits it is 5 bits In other cases it is 1 5 bits ODD PARITYIEVEN PARITY Odd parity Even parity DISPLAY PARITY Parity generation check Disable parity generation check DATA LENGTH 5 bits 6 bits 7 bits 8 bits ...

Page 20: ...ETECT 0 On 1 Off D7 OVERRUN ERROR Generate an overrun error D7 DO USART DATA PORT 06 D5 FE FRAMING ERROR 1 Generate a framing error PE PARITY ERROR 1 Generate a parity error TBLE 1 D4 TRANShlITTER BUFFER REGISTER EhIPTY Able to transmit data D2 D3 LPS LOW POWER SIGNAL I Dropped Power Voltage D l DO ...

Page 21: ...inually trans nitsa Mode 0 type square wave Mode 1 This mode transmits an L pulse single pulse during one clock when finishing the terminal count Mode 2 This mode continually transmits a Mode 2 type pulse Mode 3 The OUT BD command loads the time constant to the time constant register Bit 0 to Bit 13 and also loads the mode of timer to bit 14 and bit 15 The IN BD command reads the contents of the c...

Page 22: ...face uses SID Serial Input Data and SOD Serial Output Data at 80C85 Cassette Motor control OUT 90 3 RE MOTE REMOTE MOTOR CONTROL 0 Motor Off 1 hlotor On 3 1 10 Bar Code Reader Interface Data from bar code reader BCR BCR Data from Bar Code Reader ...

Page 23: ...es less than a certain value the interrupt is enabled and power automatically turns off Interrupt Channel TRAP RST 7 5 RST 6 5 RST 5 5 Searches the input key by the 256 kHz clock which is transmitted from the timer chip pPD 1990AC UART Received interrupt from UART IM6402 BCR Interrupt from bar code reader All interrupts except TRAP have an exclusive use mask flag so each can be individually masked...

Page 24: ...Control Port PI0 81C55 Port UART DATA Port UART Control Port Keyboard LCD REMOTE 0 1 I 1 0 0 1 1 0 0 0 0 I TSTB 0 1 OUT 90 PSTB 0 1 SEL A 0 0 1 1 7 6 5 4 3 CASSETTE MOTOR CONTROL Motor Off Motor On CLOCK COMMAND STROBE Strobe Off Strobe On SEL A PRINTER STROBE Strobe Off Strobe On SEL B PSTB SEL B SERIAL INTERFACE SELECT 0 Not Used 1 S102 0 SIO1 I RS 232C TSTB MOTE I R E ...

Page 25: ... to FFFFH 0 0 Standard RAM 0 1 Not Used 1 0 Bank 2 RAM 2 1 1 Bank 3 RAM 3 3 Bank Status BIT 1 0 0 1 1 BIT 3 0 0 1 1 BIT 0 STATUS OF O H TO 7FFFH 0 Bank O RON 0 1 Bank 1 ROM 1 0 Bank 2 RAM 2 1 Bank 3 RAM 3 BIT 2 STATUS OF ADDRESS 8000H TO FFFFH 0 Standard RAM 1 Not Used 0 Bank 2 RAM 2 1 Bank 3 RAM 3 BIT 6 STATUS OF SERIAL INTERFACE 0 Not Used I SI02 0 SIO1 1 RS 232C ...

Page 26: ...register General 1 1 0 Port A PA0 t o PA71 General 110 Port B PBO t o PB7 General 1 1 0 Port C PC0 t o PC51 PD7 KS7 PD7 to PDO CCK KS7 to KSO PD6 KS6 CDO CDO CCK 0 1 PD5 KS5 LCD Chip Select C2 Printer Data Port PD4 KS4 Keyboard C1 Clock Command Output Port PD3 KS3 CO Clock Data Output Port Calendar Shift Clock Clock Off Clock On PD2 KS2 PD1 KS1 PDQ KSO ...

Page 27: ...NTROL OUTPUT On Off KS8 DCDIRD SELECT OF THE RS 232C Ring Detect Data Carrier Detect PBO DTFi AUTO POWER OFF OUTI UT Output Off Output On BUZZER OUTPUT Ring Not Ring BELL DTR RS 232C DTR output Active Low RTS RTS output Active Low APO K E Port C Input p e l 5 4 3 2 1 0 DSR BCR CTS CDI BUSY SLCT ...

Page 28: ...mand Write OUT D8 CLS2 CLSl PI EPE SBS SBS 0 1 EPE 0 1 CLS2 0 0 I 1 STOP BIT SELECT Stop bit length is 1 bit If data length is 5 bits stop bit length is 1 5 bits In the other case it is 2 bit EVEN PARITY ENABLE Odd Parity Even Parity PARITY INHIBIT Generate parity and check Inhibit generating parity and check CLS1 CALENDAR LENGTH SELECT 0 Data Length 5 bits 1 Data Length 6 bits 0 Data Length 7 bit...

Page 29: ...d DCD TBRE PE FE OE RD TBRE 1 LPS 1 On Off Overrun Error Detected Framing Error Detected Parity Error Detected Transmitter Buffer register Empty ready to receive data to transmit LOW POWER SIGKAL low power voltage ...

Page 30: ... strobe Parallel data 0 Parallel data 1 Parallel data 2 Parallel data 3 Parallel data 4 Parallel data 5 Parallel data 6 Parallel data 7 Printer busy Pin number 2 4 6 8 10 12 1 4 1 6 1 8 20 22 24 Printer select 1 26 NC Signal name GND GND GND GND GND GND GND GND GND GND GND GND Remarks Signal ground Signal ground Signal ground Signal ground Signal ground Signal ground Signal ground Signal ground Si...

Page 31: ...n DIN CONNECTOR ChiT Pin number 1 2 3 4 5 6 7 8 Signal name T x C GND GND MIC EAR REM1 REM2 Vcc Remarks TTL level output Signal ground Electrical power ground 1 Output to MIC Input from EAR Remote terminal Remote terminal 5 V ...

Page 32: ...sclccted by software control Remarks Protective ground Transmit data Receive data Request to send Transmission authorized Data set relay Signal ground Data carrier detect Data carrier ready Bell detect Pin number 1 2 3 4 5 6 7 8 l 20 22 25 Signal name GND TxD RxD RTS CTS DSR GND DCD D TR RD ...

Page 33: ...BCR 9 pin D SUB CONNECTOR 1 BCR 5 Pin number 1 2 3 4 5 6 7 8 9 Signal name NC R x DB NC NC GND NC GND NC vcc Remarks Not connected Receive data Not connected Not connected Signal ground Not connected Signal ground Not connected 5 v ...

Page 34: ...8 pin DuPont BERG modular jack SIO1 Pin number 1 2 3 4 5 6 7 8 Signal name GND TxD RxR RTS CTS Vcc NC NC Remarks Signal ground Transmit data Receive data Request to send Transmission authorized 5 V Not connected Not connected ...

Page 35: ...S102 Interface S102 6 pin DuPont BERG modular jack Pin number 1 2 3 4 5 6 Signal name GND TxD RxR RTS CIS Vcc 7 Remarks Signal ground Transmit data Receive data Request to send Transmission authorized 5 V ...

Page 36: ...l name VDD VDD ADO AD4 AD 1 AD5 AD2 AD6 AD3 AD7 NC NC A8 A12 A9 A13 A10 A14 Remarks 5 V t5 V AddressIData 0 AddressIData 4 AddressIData 1 AddressIData 5 AddresstData 2 AddressIData 6 AddressIData 3 AddressIData 7 No Connection No Connection Address 8 Address 12 Address 9 Address 13 Address 10 Address 14 ...

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Page 38: ... Cd battery PC 820 1 90 This can be used for more than 5 5 hours Normal temperature at standby 16K RAM It is possible to floating charge charge 48 M No time limit for recharging It is charged in spite of power on or off of the PC 8201 No Connection 3 AC adapter PC 8271 01 The AC adapter specifications are based on the functional specifications of the PC 8271 01 The PC 8201 has an EMERGENCY battery...

Page 39: ...rder Can be directly connected with commercial audio cassette tape recorder 5 Serial 1 1 0 Can be directly conr ectedwith periplieral interfaces having a CMOS serial interface 6 ROMIRAM Cartridge Use to expand the system bus slot 7 Other Peripheral Circuits Via syslem bus slot 3 4 Software lnterface The PC 8201 is a peripheral computer which uses 8 bit CMOS and an 80C85 CI U The command set is the...

Page 40: ...de by Alps i 1 PC 8201 Keyboard Character codes 60H and 7EH cannot be transmitted from the keyboard k2 Grapllic key combination input Character codes 8011 to 9FII can be inpiit by depressing key together with the graphic key Character codes AOH to BFI I can be input by combining the graphic key and shift key 3 User Defined Characters Character codes 83H t o FFH can be defined by the user PC 8201Ke...

Page 41: ...1 1 0 I A Q 3 C S CIK CIL ClM J CIN C O J Z J K L I M I 0100 2 B R b 4 D T d t 5 E U e u 6 F V f v 8 H X h x 1 9 1 Y i y ESC f c A n G I GI GI GI GI1 0101 p 7 G W g w 0 1 2 3 4 9 6 7 8 9 A B C D E F 0 1 1 1 P 4 a q J s 0110 c k m 0 GSlF GSlG GSlH GSIJ GSlK l o o 0 GIZ GIX GIC r m GIV GI5 GIN GIM GIL G I A GIs GID GSI GSI GSI GSI GSI I DEL GIF GIG GIH GIJ GIK 1 0 0 1 GIQ GIW GIE GIR GIT GIY GIU GI1...

Page 42: ...anty 80C85 2 4 MHz operation 32K bytes Max 64K bytes 16K bytes Max 64K bytes 240 x 64 dots 40 characters x 8 rows Centronics specification one channel D1990AC Keyboard See Item 4 5 300 to 19200 baud ChlOS level two connectors 300 to 19200 baud 5 V output one channel Serial I F uses the same serial channel as the RS 232C I F by switching Compatible with the PC 8001 Based on HREDS 3050 interface mad...

Page 43: ... Remove the battery case turn off the backup power switch If using an AC adapter remove it also 4 1 1 PC 8201Cover Bottom Side e m o v escrews to remove cover four points Turn the PC 8201 over and unscrew eleven points LED connector Printer connector Power supply board e y b o a r d connector Main board Kevboard Uncovered PC 8201 ...

Page 44: ... 4 1 3 Keyboard L cyboard connector I I Keyboard mounting screws Five Points Remove the two keyboard connectors unscrew the keyboard Five Points 4 1 4 Power Supply Board Screw Power to power supply board supply connector Remove power lo d supply connector unscrew the power supply board ...

Page 45: ...tor Two Speaker connector Slot cover Four Main board Five 4 2 Reassembly CAUTION Before continuing save any data in RAhI using the cassette tape After completing adjustments reload KAhl from the cassette 4 2 1 LCD Board 1 Turn off the power remove the battery case turn off the backup power switch If using an AC adapter remove it also 2 Remove the PC 820 1 cover Remove the LCD board 3 Keplace the L...

Page 46: ...7 01 cover Remove the keyboard switch 3 Search for the key number of the keyboard switch to be changed The key number is written on the keyboard printed circuit board 4 Remove the solder from the key switch to be changed When removing solder be careful not to damage or cut the pattern 5 PLIIIoiit the key top 6 Remove the key switch Pull up pinching the lock with pliers 7 When installing a new swit...

Page 47: ...d 1 Turn off the power remove the battery case turn off the backup power switch If using an AC adapter remove it also 2 Remove PC 8201 cover Remove LCD connector Remove LED connector Remove keyboard connector Remove power supply connector Remove main board 3 Replace the main board 4 Reassemble in reverse order 4 2 6 ROM 1 Turn off the power remove the battery case turn off the backup power switch ...

Page 48: ...ntly pry LIP 4 Insert new ROM chips in socket 5 Replace ROhl cover 4 3 l nstallation 4 3 1 Inserting Cartridge RAM ROM Left Side System Slot i n e n using RAhl cartridge or ROkl cartridge insert into the system slot If inserting the cartridge turn off the power and insert cartridge firmly ...

Page 49: ...y four SUM3 batteries The PC 8201 is not shipped with batteries inserted The following procedure explains how to insert 1 Turn off the power and turn unit upside down 2 Applying pressure on points A and B slide the battery cassette out from the main unit ...

Page 50: ... 3 Remove the battery cassette Set it like following 4 Insert a coin in the guide groove and twist to the arrow to remove the upper cover ...

Page 51: ... 5 lnsert batteries The spring sidc is the negative pole Set the cells carefully like following 6 Replace the cover If it closed it snaps Then reassemble in reverse order 4 9 4 10 blank ...

Page 52: ...eparation The following is needed for the operatiorls test 1 Oscilloscope 100 MHz 2 Tester 3 Test Connector 5 1 Operations Test Flow Chart START norma LCC Snrplar 5 3 1 Abrorml Calendar Clock Abnormal F r n m t o r l a c e 5 3 j ...

Page 53: ...supply operation is abnormal see Item 6 2 1 PC 89 01 Abnormal Power Supply 5 2 2 Reset Operation Test AS soon as the power supply is turned on or reset is depressed the RESET signal in U17 80C85 P36 changes from H level to L level and the RESET OUT signal in U17 P3 changes from L level to H level Figure 5 1 Reset Operating Test If reset is abnormal see Item 6 2 9 PC 8301 Abnormal Reset ...

Page 54: ... Terminal Connection Top view 1 80C85 Terminal Signals When turning on the PC 8301 power siipply or depressing the reset switch if each terminal of U17 80C85 operates correctly you can confirm the p llsechanging to the opposite level at each terminal Following signals are like next RESET P36 13 level 5 V RESET OUT P3 L level O V I I LDA P38 L level O V TRAP P6 L level O V VDD 5 V P40 H level 5 V G...

Page 55: ... TEXT TELCOM Load Save Name List 12374 Figure 5 3 Start Message 3 80C85 Operation Signal If the PC 8201 operates cor cctly you can confirm the signal in Figure 5 4 CLOCK l u u u u u u ADO AD7 ALE n 0 6 5 1 Figure 5 4 80C85 Operating Test ...

Page 56: ...abnormal see Itern 6 2 4 5 2 5 Calendar Cloclc Operation Test hleasure whether the signal in Figure 5 6 is being transmitted to U20 P10 of calendar clock I 4ms I Figure 5 6 Calendar Clock Signal Reference Figure 5 7 Calendar Clock Peripheral Circuit If the calendar clock is abnormal see Item 6 2 5 Abnormal Calendar Clock 1 I1 32 768K I 3 3 MR 2 RESET 9 CHI 9 9 CHI 4 I 1 KEY INT 1 U17 7 Figure 5 7 ...

Page 57: ... 240 56 OUT 185 255 OUT 186 3 OUT 240 57 60 OUT 240 56 OUT 185 255 2 N OUT 240 57 70 FOR I 1 TO 600 NEXT 80 OUT 185 0 OUT 186 0 OUT 240 57 90 NEXT O U T 240 56 100 FOR N O TO 1 110 O U T 240 56 OUT 186 3 2 N OUT 240 57 120 FOR 1 1 TO 600 NEXT 125 OUT 185 255 OUT 186 3 130 NEXT 140 OUT 185 255 OUT 186 3 150 OUT 240 56 OUT 240 57 Figure 5 8 Test Program Figure 5 9 LCD Canvas b Block No 5 Block No 10...

Page 58: ...f m the signal in Figure 5 1 1 on LCD connector CN7 10 PRINT 1 GOT0 10 Figure 5 10 Test Program Figure 5 11 LCD Connector Signal Reference Figure 5 12 LCD Peripheral Circuit If the LCD is abnormal see Item 6 3 1 Abnormal LCD VEE Figure 5 12 LCD Peripheral Circuit ...

Page 59: ...s displayed or SI02 ERROR is displayed You can confirm the signal in Figure 5 1 5 in P2 and P3 of the S102 connector 10 OUT 144 64 OUT 2 1 6 2 7 20 OUT 188 3 OUT 189 64 PRINT CHR 12 30 FOR A l TO 255 OUT 260 A B INP 200 31 V INP 216 AND 4 I F A 4 THEN LPRINT OKK 40 I F A B GOTO 80 ELSE PRINT B 60 NEXT 70 PR1NT PRINT S I 0 2 TEST OKM END 80 PR1NT PRINT S I 0 2 ERROR END Figure 5 13 Test Program S10...

Page 60: ... Reference Figure 5 16 Serial Interface Peripheral Circuit If SI02 is abnormal see ltcrn 6 3 2 Abnormal SI02 Figure 5 15 S102 Data Signal 5 9 5 10 blank ...

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Page 62: ...BCR TEST OK is displayed or BCR ERROR is displayed The signal in U27 P6 changes from an L level to H level by connecting the circuit 10 FOR N 1 TO 255 20 A INP 187 AND 8 30 I F A AND 8 THEN PRINT N ELSE GOTO 100 40 NEXT 50 PRINT PRINT BCR TEST OK END 100 PRINT PRINT BCR ERROR Figure 5 17 Test Program 1 BCR Connector 5 Figure 5 18 Pin Connection I Pin number 2 5 7 9 Signal name R x DB GND GND vcc ...

Page 63: ...4U43 9 SOD 7 BCR CLK CLK 9 CN1 12 LPS TRAP KEYlNT RST 7 5 DR RST 6 5 SI 9 CN1 9 RESET RESET C34 1 1O O O P A9 8 CN5 35 RESET0 31RE SET 2 1 F OUT WR 8 CN5 36 READY VDD 8 CN5 31 HOLD IoLD GND AD7 l9 8 CN5 34 INTA 11 INTA AD6 8 CN5 33 INTR R63 lNTR AD5 R78 lOOK AD4 l6 lOlM lOlM AD2 8 CN5 32 HLDA HLDA Figure 5 19 BCR Peripheral Circuit ...

Page 64: ...ou can confir111 each terminal signal in Figure 5 22 RS 232C TEST OK is displayed when the test is finished IT it is abnormal RS 232C ERROR is displayed 10 OUT 144 192 OUT 216 27 20 OUT 188 3 OUT 189 64 PRINT CHRB 12 30 FOR A l TO 255 OUT 200 A B INP 200 40 I F A B GOT0 80 ELSE PRINT B 50 FOR N l TO 100 NEXT 60 NEXT 70 PRINT PRINT RS 232C TEST OK END 80 PR1NT PRINT RS 232C ERROR END Figure 5 20 Te...

Page 65: ...Figure 5 22 RS 232C Data Signal RS 232C connector IP21 DO Q8 Data Reference Figure 5 16 Serial Interface Peripheral Circuit If the RS 332C is abnormal see Item 6 3 4 Abnormal RS 232C ...

Page 66: ...EST OIC is displayed otherwise SIOl ERROR is displayed If SIOl operates correctly you can verify the signal in Figure 5 25 at the connector pin 10 OUT 144 28 OUT 216 27 20 OUT 188 8 OUT 189 64 PRINT CHR 12 30 FOR A l TO 2 5 5 OUT 200 A B INP 288 40 I F A B GOT0 80 ELSE PRINT B 60 NEXT 70 PR1NT PRINT S I O 1 TEST OK END 80 PR1NT PRINT S I O 1 ERROR END Figure 5 23 Test Program SlOl 8 pin DuPont BER...

Page 67: ...Start bit Stoo bit Figure 5 25 SlOl Data Signal Reference Figure 5 16 Serial Interface Peripheral Circuit If the SIO1 interface is abnormal see Item 6 3 5 Abnormal S101 ...

Page 68: ... 1 The terminal number l PSTB transmits H level and the terminal number 21 BUSY transmits L level 2 By executing the test program in Figure 5 27 you can verify the signal in Figure 5 28 Printer 26 pin connector 2 5 PRINTER 1 I Figure 5 26 Connected Circuit lb LPRINT CHRS 255 GOTO 10 Figure 5 27 Test Program 5 19 ...

Page 69: ...gure 5 28 Each Terminal Signal Reference Figure 5 29 Printer Interface Peripheral Circuit If the printer interface is abnormal see Iteni6 3 6 Abnormal Printer Interface Figure 5 29 Printer Interface Peripheral Circuit ...

Page 70: ... test command in Figure 5 30 you can verify the signal in Figure 5 31 CSAVE X L Figure 5 30 Test Command Space I Mark Signal at U43 P9 p I I I H I H Signal at U27 PI21 I I I I 0 21 ms Signal at U43 P I I Signal between R21 and R M Figure 5 31 Terminal Signals Signal at U43 P I 1 I I I ...

Page 71: ...5 32 with the cassette connector a By connecting the circuit you can measure the signal in Figure 5 33 Figure 5 32 Pin Connection Pin number 1 2 3 4 5 6 7 8 Signal at U 2 6 P21 1 I V Signal name T x C GND GND M IC EAR REMl R EM2 Vcc Figure 5 33 Terminal Signals ...

Page 72: ...ure 5 35 CSAVE X Figure 5 34 Test Command t Mark I Signal at U26 P61 Figure 5 35 Terminal Signals Reference Figure 5 36 Audio Cassette Interface Peripheral Circuit If the Audio cassette interface is abnormal see Item 6 3 7 Abnormal Audio Cassette Interface 5 23 5 24 blank ...

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Page 74: ...nal at U36 P9 changes from L level to H level 10 OUT 144 8 7 Figure 5 37 Test Program 2 OUT A 11 1 Operating Test If pushing the S1 IIFT key and the BANK key at the same time in MENU mode you can confirm the signal shown in Figure 5 38 in U53 PI Figure 5 38 Signal in U53 PI 3 IN AOH Operation Test By pushing the SHIFT key and the BANK key at the same time in h1ENU mode the signal in U 11 P2 change...

Page 75: ...Figure 5 40 Test Program Figure 5 41 Signal in U18 P21 5 OUT BAH Operation Test By executing the test program in Figure 5 42 the signal in U18 1 3 1 changes from H level to L level 10 OUT 186 0 Figure 5 42 Test Program 6 I N BBH Operation Test You can confirm the signal shown in Figure 5 43 in U18 P37 Figure 5 43 Signal in U18 P37 ...

Page 76: ...ce Operating Test By executing the test program in Figure 5 44 you can confirm the signal shown in Figure 5 45 in U21 P12 10 OUT 144 192 OUT 216 3 20 OUT 183 3 OUT 189 64 PRINT CHRS 12 30 A 9 OUT 200 A B INP 200 48 I F A O B GOT0 80 ELSE PRINT B 78 GOT0 30 80 PRINT ERROR Figure 5 44 Test Program Start bir Figure 5 45 Signal in U21 PI21 f 50ps DO D7 Data ...

Page 77: ...12 4 10 OUT 144 192 OUT 216 27 20 OUT 183 3 OUT 189 64 PRINT CHRS 12 30 A 9 OUT 200 A B INP 200 40 I F A O B GOT0 80 ELSE PRINT B 70 GOT0 30 80 PRINT ERROR Figure 5 46 Test Program Figure 5 47 Signal in U21 P12 9 IN D8H Operation Test a When switching the power switch from OFF to ON the signal in U34 P2 changes from L level to H level b Execute the test program in Figure 5 48 if IN D8H is normal 1...

Page 78: ...r is normal it repeats ON and OFF 10 BEEP 20 GOT0 10 Figure 5 49 5 3 10 Keyboard Operation Test 1 Push all key switches and verify that the character is displayed on the LCD when pushing character key switch and that the special functions operate correctly when pushing special function key switches 5 3 1 5 32 blank ...

Page 79: ...lear the user s claim and describe it in a reception or a report Describe the accessories in a reception Repairing thc instruments which have set switches s l c l as mode notcs the switch condition Check the view If it is damaged according the claim repair it If the damage does not accord the claim repair it after consulting the user Reference CHAPTER 4 DISASSEhlBLY REASSEMBLY CHAPTER 5 OPERATING ...

Page 80: ...art Check the view No Replace the damaged pan I 1 I Full turn the contrast switch and verify the LCD I Switch ON Verify the power switch and backup switch I See Item 6 2 1 Abnormal Power Supply I I Replace the Bertery Cassette I ...

Page 81: ...display is I Replace the Power board I Yes Replace the LCD unit r l Yes Replace the main board 7 Return it to factory ...

Page 82: ...ce manual I I I I Whe the tlrne Lack of the Cannot mput IS o e tt Cannot key n character of the specla1 1s bad LCD drsplay character Replace the rnarn board Replacc the LCD board Cdble connectcon Replace the R e p i the keyboard keyboard dntt cable connectto Replace the maln board Replace the keyboard ...

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Page 84: ...3 1 Abnormal 5102 Port n 6 3 2 Abnormal BCR lnterface i6 I Abnormal RS 232C Interface 6 3 4 Abnormal SlOl lnterface Abnormal Printer lnterface I Abnormal 4 Cassette Interface 6 3 7 Abnormal 110 Port 6 3 8 Abnormal Speaker 6 3 9 Abnormal Keyboard Yes 6 3 10 Abnormal CPU Clock Yes 6 2 4 Abnormal Calendar Clock 6 2 5 ...

Page 85: ...tte 6 V 2 Is 6 V of power being transmitted to CN3 P3 on the power board b When using a DC adapter 1 Is the 9 V power supplied to DC adapter 2 Is the 9 V power supplied to CN3 P3 on the power board If it is not supplied there the adapter jack connection is bad or D8 is bad c When using a battery or DC adapter 1 Is the signal transmitted to each part in Figure 6 l Figure 6 1 Power Supply Circuit Ou...

Page 86: ...istor 2 is bad n symptoms Reset is not enabled at power on a When pushing a reset switch if reset does not operate the reset switch is bad b Check the collectors of transistors 2 and 1 6 2 3 PC 8201 Abnormal CPU 80C853 Symptoms The CPU does not operate See Item 5 1 3 CPU 80C85 Operation Test If you can verify following abnormalities exchange the CPU board 1 Causes a KESET P36 is L Icvel b READY is...

Page 87: ...lowing abnormalities exchange the LCD board a If you can verify the correct signal at the LCD connector the LCD board is bad b If the correct signal is not at the LCD connector U18 U42 U23 U16 U U3 U4 US U17 or U14 are bad 6 3 2 Abnormal S102 Port See Item 5 2 2 SI02 Port Operation Test If you can verify following abnormalities exchange the CPU board a If something is abnormal when executing the g...

Page 88: ...rface Operation Test If you can verify following abnormalities exchange the CPU board a If the data signal PDBO to PDB7 is abnormal confir111 the signal in U28 and in u35 If they are normal the printer bus connector is bad If they are abnormal U28 or U35 are bad b If PSTB signal is abnormal confirm the signal in U12 P2 If it is normal the printer bus connector is bad If it is abnormal U12 is bad c...

Page 89: ...normal If the output signal at U53 PI is abnormal U33 UI I or U53 are bad C IN AOH is abnormal If the output signal at U1 1 P2 is abnormal U11 or U33 are bad d OUT B9H is abnormal If the output signal at U 18 P2 1 is abnormal U 18 is bad e OUT BAH is abnormal If the output signal at U 18 P3 1 is abnormal U18 is bad f IN BBH is abnormal If the output signal at U 18 P37 is abnormal U20 is bad g OUT ...

Page 90: ...peaker doesn t stop the operation a Exchange the CPU board 6 3 1 0 Abnormal Keyboard See Item 5 2 10 Keyboard Operation Test I Abnormal Symptom I Though only one key is pushed more than two characters are displayed 1 The cause is chattering of key board so exchange the keyboard Abnormal bymptom Nothing is displayed on the LCD 1 If specific character is not displayed the key switch is bad Exchange ...

Page 91: ...on the Back up switch I N0 Push ICTRL key and Check the increasing p m i key together ROM then push the reset switch Set the bank I is displayed on the The PC 8201 is abnormal The increasing ROM 1 If bank i t 2 is not set this operation is unneccessary or the PC 8201 is abnormal APX A 1 ...

Page 92: ...2 YES I N0 Turn off the PROTECT switch t Remove the RAM cortridge power off turn off the Back up Power s vitch lor ten seconds Then set the RAM N0 YES cartr dge and power on J I Check increasing RAM and TELCOM don t YES YES I The ncreasingROM is abnormal i N0 Turn off the PROTECT switch of the R A M cartridge ...

Page 93: ...battery for ten seconds Then set the battery and TELCOM don t Cannot key irput The program doer not go ahead 3 When executing cold start turn on the PROTECT switch of the PC 8201 and the one of the RAM cartr dge But the program 1s Bank 1 is cleared APX A APX A 4 blank ...

Page 94: ...y pull the IC with a puller which fits the width and the number of pins If you do not have 3 puller pull carefully be sure not to bend the pins with the pliers 2 Insertion a Insert the 1C pins in their holes turn board upside down Use an electrically conductive mat under the PC 8201 when working on it b Put a little solder on the iron C Put the iron closely and heat At once the solder melts It is ...

Page 95: ...down Be careful not to bend the IC pins 12 Insertion in socket a Gently insert the IC If you don t have a puller insert it after confirming that all pins have been inserted correctly 0 4 Drawings of Insertion and Removal of IC Removal 1 Removc solder 2 Remove IC with pliers or puller Installation 1 Insert the IC pins in their holes 2 hlelt some solder on tip of the iron ...

Page 96: ... 3 Attach some solder at the point of connection APX B 3 XPX B 4 blank ...

Page 97: ...APPENDIX C PARTS LIST If you need to repair the PC 8201 change the unit parts Prepare the maintenance parts shown in Table 1 APX C I ...

Page 98: ...WITCH LOCK KEY TOP KIT 60 items NOTE brITH Ni Cd BATTERY Separate package COhIiVlON TO PC 8201 JAPMN COhlXlON TO PC 8201 JAPAN COhlMON TO PC 8201 JAPAN COPvlklON TO PC 8201 JAPAN COhIhlON TO PC 8201 JAPAN COhII ION TO PC 8201 JAPAN COblblOh TO PC 8201 JAPAN 0 h l h l 0 h TO PC 8201 JMAX COMhION TO PC 8201 JAPAN COklihilON TO PC 820 1 J MAN COMhlON TO PC 8201 JAPAN COllhlON TO PC 8201 JAPAN ADDITIO...

Page 99: ...81 01 CPU Circuit 2 PC 81 01 RAhi Circuit 3 PC 8201 ROhl Circuit 4 PC 8301 CMT Circuit 5 PC 81 01 8 155 Circuit 6 PC 8501 6402 Circuit 5 PC 830 1 Keyboard Circuit 8 PC 820 1 Connector Circuit 9 PC 8201 Power Source Unit Circuit APX D l APX D 2 blank ...

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Page 109: ...ower dissipation as compared wit11 the blShi8085A promising high performance system configuration Features High speed and low power dissipation enabled by use of silicon gate CMOS technologies Single power supply of 3 V to 6 V Compatibility with hlSM8085A Instruction cycle 1 3 ps on Vcc 5 V Built in clock oscillator For vectored interrupts One nonrnaskable Built in serial inputloutput ports One in...

Page 110: ...Circuit Configuration These specifications are subject to change without notice ...

Page 111: ...Pin Connections Top View 40 Lead Plastic DIP RESET OUT 3 SID 5 TRAP 6 RST7 5 7 RST6 5 38 HOLD 37 CLK OUT RESET IN 3IOJM ...

Page 112: ...output Output Output Input Input Input Output Used to select storagc or 110 address for read or to show that data bus should be used in dara transfer I laced in high impedance state at HOLD and HALT modes Enable data on data bus to be written into selected storage or 110 address Data is written at trailing edge of WR Placed in high impedance state at HOLD and HALT modes These three input signals h...

Page 113: ...trol at the next clock cycle Upon completion of I IOLD HLDA goes low At the half clock cycle following the disasserted HLDA CPU resumes bus control Used as general purpose interrupt request IXTK executes sampling only a1 thc last clock cycle of instruction W e n interrupt is received INTR stops the program counter and asserrs INTA KESTART or CALL signal can be inserted to m make an interruption in...

Page 114: ...art of each machine cycle Bus status are given as follows HALT 0 0 READ 1 0 FETCH 1 1 Interrupts and serial 110 The EvISkf80C85A is provided with five interrupt input lines INTR RST5 5 RST6 5 RST7 5 and TRAP INTR functions the same as the lISM8080A INT RST input lines 5 5 6 5 and 7 5 are all niaskable restart interrupts TRAP is an unmaskable restart interrupt Restart interrupt priority is determin...

Page 115: ...t the I O read and write cycles the upper and lower eight bits of the address become equal If slower storage or I O is used in the hlSM80C85A Titr 1 rstatus can be inserted using the READY signal the same as with the MSX18080A ADO AD7 ALE RD Figure 1 Basic Timing Chart for Instructions WR I Io m 4 i I I Driving circuits for inputs XI and X2 Inputs XI and X2 of the MSM80C85A can be driven either by...

Page 116: ...y by I 1 1 2 2 3 3 3 3 5 g 2 a 2 3 a t B f 3 lg 5 13 16 16 4 16 4 7 0 0 1 I I 0 1 0 1 1 2 B3 SP lI L 8 C A B 0 A A A B C A D El lm A Num cyd 1 2 2 2 3 3 3 3 3 3 3 3 I 1 7 10 LO 10 10 4 7 7 J 7 7 7 7 I Z 2 2 2 4 7 1 7 6 7 7 7 7 13 SHLO m LHLD m XCHG X l l l L ADD r ADD M AD1 n ADC I ADC hl ACI n DAD U DAD D DAD H DAD SP SUB r SUB I SUI n 12 2 I 1 1 I 1 3 1 I I 1 1 1 2 1 1 2 1 1 2 I 0 0 L O O 0 1 0 ...

Page 117: ...0 1 i 0 I 0 0 1 0 B2 c B3 1 1 0 0 1 0 1 0 BZ 83 1 1 0 0 0 0 1 0 B2 B3 1 I 1 1 0 0 1 0 B B 3 I I i 1 1 0 1 0 B 2 B3 1 1 I 0 1 0 1 0 B2 B3 1 1 1 0 0 0 1 0 B2 03 g 1xx H ISX SP DCX B DCX SP 5 i 7 r u C Accum mr c c M c I instructio s i Functions A AlV r A A I V W whue 31 11 1 A A T n Nurn be b y e 1 1 2 RLC RKC RAL I RAR ChfA D A A V 8 A A V0 1 wllere I H L A A V n A Tu a n mbcrs A Y are compared I H...

Page 118: ... O I 0 0 0 I 1 1 0 0 0 0 0 I 1 0 I I 0 1 1 02 I I o I o o I I B 2 I 1 1 1 1 0 1 1 I 1 1 1 0 0 1 1 1 I I 1 0 1 0 I I I 0 0 0 1 0 1 I 1 0 1 0 1 0 1 I I 1 0 0 1 0 1 I I 1 I 0 0 0 I 1 1 0 0 0 0 0 1 I 0 1 0 0 0 1 1 I I 0 0 0 0 1 0 1 1 1 0 I 1 0 o a 0 0 0 0 0 0 O U 1 0 0 0 0 0 Num llar al qJ I zz 5 ISM loo 0 0 0 0 Fc nsltonr 5 3 512 9 2 512 512 512 S L 512 U 2 3 311 311 311 311 311 311 311 311 3 3 I I 3...

Page 119: ...flags such as S Z P CYl and CY2 These flags are configured in the order of S Z X CY1 X P X and CY2 where X shows undetermined flag Program counter Stack pointer Sequential order determined by register or storage contents Table shown below lists order values for SSS or DDD where hi H L Indicates direction of data trasfer Indicates contents of register storage erc Logical sum Exclusive logical sum L...

Page 120: ...pzraturc Low input voltage level High input voltage level Unit V C Ratings 0 5 t 7 0 5 Vcc 0 5 0 5 Vcc tO 5 Symbol Vcc TOP Parameter Low output voltage level High output voltage level Input leakage current Output leakage current Supply current Unit V V V MIN 4 5 40 Symbol VOL VOH 55 l50 1 C 1 O TYP 5 25 VIL 1 0 3 W t0 8 Vcc 0 3 V I I I lOH 40pA Measurement conditions V V MAX 5 5 85 2 2 MIN 3 4 101...

Page 121: ...A8 15 valid to trailing edge of ALE Delay time from AO 7 valid ro trailing cdge of ALE Time for which address is deter mined after leading edge of control signal t c y c 320 ns CL 150 pF Clock rise or fall time I t r t f tAFR tXL tALL Control signal pulse width I tCC I 30 30 Delay time from leading edge of XI to that of CLK Delay time from leading edge of Delay time from leading edge of control si...

Page 122: ...e of CLK Set up time of HOLD for trailing edge of CLK Hold time of INTR for trailing edge of CLK Set up time of INTR for trailing edge of CLK Time for which address is valid Symbol 11IDEI tHDS tlNH INS Measurement conditions t c y c 320 ns C L I S O p F MIN 0 170 0 160 MAX ...

Page 123: ... 8 V VOH 2 2V and input reference voltage is 1 5 V Timing Charts MAX 40 Parameter Delay time from trailing edge of WR to data validity Clock waveform Unit ns Measurement conditions tcyc 320 ns CL 150 pF Symbol tWDL X1 INPUT u MIN OUTPUT Read cycle CLK 1 T I I 12 I Tw 1 r I 13 I TI READY Note READY must stay unchanged throughout set up and hold tirnes APX E 15 ...

Page 124: ...K I T1 I 12 I TWAIT I T3 I TI Y pen DATA OUT x READY Note READY must stay unchanged throughout set up and hold times Hold cycle CLK HLDA Interrupt and hold cycle HLDA Dur ng thls time lapse IOIM is float ng XPX E 16 ...

Page 125: ... has three general purpose I O ports two 8 bit porls and one 6 bit port rcspectively ports A B and C Port C is used to enable and set the modes for the other two ports hlSXl8lC55RS also has a 14 bit built in programmable counterltimer which can be used to generate square pulses for timers or count pulses Features High speed operation and low power dissipation RAM configuration of 256 x 8 bit bytes...

Page 126: ...ADO 7 CE 256 x 8 STATIC PORT A bPAO PORT B 1QPBO PORT C 13pc0 5 TIMER CLKJ VCC 5 v TIMER OUT GND 0 V These specifications are subject to change without notice Pin Connections MSM81C55RS Top Viewl 40 Lead Plastic DIP APX E 18 ...

Page 127: ...l Characteristics Absolute maximum ratings APX E 19 Parameter Supply voltage Input voltage Output voltage Storage temperature Allowable power dissipation Conditions In reference to GND Ta 25 C Ta 25 C Symbol Vcc VIN VoUT Tstg PD Unit V V V C W Ratings MSM81C55RS MSM81C55GS 0 5 7 0 5 Vcc t0 5 0 5 Vcc 7k0 5 55 I50 1 O 0 7 ...

Page 128: ...ymbol Vcc TOP VIL VIH MIN 4 5 40 0 3 1 2 MAX 5 5 85 0 8 Vcc 0 3 MIN 2 4 4 2 10 10 Parameter Low output voltage level High output voltage level Inpur leakage current Output leakage current Unit V C V V Symbol VOL VOFI ILI ILO I O L 2 m A IOH 400pA IOH 4OPA OIVISSVCC OIVOUTSVCC I CElVcc 0 2 V VIHZVCC 0 2 V V i 5 0 2 v Storage cycle time I p s TYP 0 1 Vcc 4 5 V 5 5 V Ta 4 0 C 8 5 I MAX 0 45 10 10 100...

Page 129: ...Switching characteristics Vcc 1 5 V 5 W Ta 40 8S0C Note The above timings for both input and output are all measured with VL 0 8 V and Vii 2 2 V as the reference level ...

Page 130: ...Timing Charts Read cyclc Write cyclc I ADO 7 ADDRESS DATA VALID P S t r o b e d input rnocle Y INPUT DATA ...

Page 131: ...PUT k DATA BUS Basic output mode DATA BUS OUTPUT The timing for DATA BUS is the same 3 s that for read or write cycle Timer waveform Count length register Count length register 1 2 1 1 Note 3 This dotted line pulse is periodically ourput depending on the program contents for the output mode MI 11 ...

Page 132: ...u I Standby mode 5 v Unit V p A 1 1s ns Conditions Parameter Ratings Symbol Hold Time Data Holding Supply Voltage Data Holding Supply Current Set Up Time MAX 2 0 MIN 2 0 30 TYP 0 05 1 VCCH I VIN 0 V or Vcc ALE 0 V R ICCH S U 1 20 Vcc 2 V ALE 0 VIN 0 V or Vcc ...

Page 133: ...level at enables a read from RAM onto ADO to AD7 during a RAM cycle or selected port data durnig an 110 cycle A low level at m e n a b l e s data on ADO to AD7 to be wrilten to RAM during a RAM cycle or to a selected port during an 110 cycle General purpose 110 pins The direction of data is determined by programming the command status register CIS register Can be used as a general purpose 110 pin ...

Page 134: ... PA0 hrough PA7 I through PB7 Refer to allocation Itable for pon Control given below 00 NOP no era ti on has no effects on counter operation 01 STOP Stops when timer is rl nning Otherwise NOP STOP AFTER TC Stops when TC is reached Otherwise NOP START Starts immediately after entering mode and count length if timer is not operating When timer is operating the command enters new mode and count lengt...

Page 135: ...B BF TIMER 4 PC register The IJC register can be used as an input port output or for control signal according to the contents of CIS register I 0 address of the PC register is XXXXXOI I INTR A INTR B INTE B 5 Tirtier This is a 14 bit counter which counts TIMER pulses and outputs a square p l s e when the final value of TC is reached The I 0 address of the timer register s lower byte is XXXXX100 Wh...

Page 136: ... the output is high for 5 counts and low for four Note 2 When the hlShI81CSjRS is reset it stops counting The counter is not set to any specific initial value or output mode TO resume counting after a reset use the START instruction in the CIS register 6 Standby mode Standby mode is provided at the trailing edge of ALE after is disasserted This is because CE from thc h lSM81C55RS is latched at the...

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