NEC MuPD70F3187, User Manual

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255 User’s Manual U16580EE3V1UD00
Chapter 8 Clock Generator
The clock generator (CG) generates and controls the internal system clock (f
XX
) that is supplied to each
internal unit, such as the CPU.
8.1 Features
• Multiplier function using a phase locked loop (PLL) synthesizer (f
XX
= 4
×
f
X
)
- Crystal frequency: f
X
= 16 MHz
- Internal system clock: f
XX
= 64 MHz
• Power saving mode: HALT mode
8.2 Configuration
Figure 8-1: Clock Generator
Remark: f
X
: External resonator or external clock frequency
f
XX
: Internal system clock
An external resonator or crystal is connected to X1 and X2 pins, whose frequency is multiplied by the
PLL synthesizer. By this an internal system clock (f
XX
) is generated that is 4 times the frequency (f
X
) of
the external resonator or crystal.
The clock controller enables PLL automatically and starts clock supply to the system after oscillation
stabilization time has passed.
Internal System Clock Frequency
(f
XX
)
External Resonator or Crystal Frequency
(f
X
)
64.000 MHz 16.0000 MHz
X1
X2
f
X
f
XX
CPU
On-chip peripheral I/O
Clock Generator
(CG)