103
Chapter 3
CPU Function
Preliminary User’s Manual U15839EE1V0UM00
3.6 Specific
Registers
Specific registers are registers that are protected from being written with illegal data due to erroneous
program execution, etc. The write access of these specific registers is executed in a specific sequence,
and if abnormal store operations occur, it is notified by the peripheral status register (PHS).
The V850E/CA2 Jupiter has five specific registers, the clock control register (CKC), the watchdog timer
clock control register (WCC), the processor clock control register (PCC) and the power save control
register (PSC).
For details of the CKC, WCC and PCC register please refer to the chapter 9.3.1 “Clock Control Reg-
ister (CKC)” on page 241.
For details of the PSC register please refer to the chapter 9.4.3 “Power Saving Mode Functions” on
page 254.
The access sequence to the specified registers is shown below.
The following sequence shows the data setting of the specific registers.
• Store instruction (ST/SST instruction)
• Bit operation instruction (SET1/CLR1/NOT1 instruction)
Please see the following example for initialization of a power save mode. The PSC register is a specific
register and therefore the PRCMD register has to be written first. The following 5 NOPs are necessary
for waken from the STOP mode.
Example
<1>
MOV
0x02,r10
<2>
ST.B
r10,PRCMD[r0]
<3>
ST.B
r10,PSC[r0]
<4>
NOP
dummy instruction (5 times NOP required)
No special sequence is required when reading the specific registers.
Remarks: 1. A store instruction to a command register will not be received with an interrupt.
This presupposes that this is done with the continuous store instructions in <1> and <2>
above in the program. If another instruction is placed between <1> and <2>, when an
interrupt is received by that instruction, the above sequence may not be established,
and cause a malfunction, so caution is necessary.
2. The data written in the PRCMD register is dummy data, but use the same general pur-
pose register for writing to the PRCMD register (<2> in the example above) as was used
in setting data in the specified register (<3> in the example above). Addressing is the
same in the case where a general purpose register is used.
3. In a store instruction to the PSC register for setting it in the software STOP mode or
IDLE mode, it is necessary to insert 1 or more NOP instructions just after. When clear-
ing each power save mode by interrupt, or when resetting after executing interrupt pro-
cessing, start executing from the next instruction without executing 1 instruction just
after the store instruction.
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