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NEC 78K0S/K 1+ Series, Application Note

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NEC 78K0S/K 1+ Series Application Note Download Page 4

 

Application Note  U18752EJ2V0AN 

4 

CHAPTER  2   CIRCUIT  DIAGRAM 

 

 

This chapter describes a circuit diagram and the peripheral hardware to be used in this sample program. 

 

2.1 Circuit 

Diagram 

 

A circuit diagram is shown below. 

 

V

DD

V

DD

V

SS

P43

P40

RESET

P22

P21

P20

V

DD

V

DD

LED3

V

DD

LED2

V

DD

LED1

SW2

SW1

78K0S/Kx1+
microcontroller

 

 

Cautions 1.  Connect  the  AV

REF

 pin directly to V

DD

 (only for the 78K0S/KA1+ and 78K0S/KB1+ 

microcontrollers). 

 

2.   Connect the AV

SS

 pin directly to GND (only for the 78K0S/KB1+ microcontroller). 

 

3.   Leave all unused pins open (unconnected), except for the pins shown in the circuit diagram 

and the AV

REF

 and AV

SS

 pins. 

 

2.2 Peripheral 

Hardware 

 

The peripheral hardware to be used is shown below. 

 

(1)  Switches (SW1, SW2) 

These switches are used as inputs to control the lighting of the LEDs. 

 

(2)  LEDs (LED1, LED2, LED3) 

The LEDs are used as outputs corresponding to switch inputs. 

 

Summary of Contents for 78K0S/K 1+ Series

Page 1: ...the microcontroller such as selecting the clock frequency or I O port have been performed CONTENTS CHAPTER 1 OVERVIEW 3 CHAPTER 2 CIRCUIT DIAGRAM 4 2 1 Circuit Diagram 4 2 2 Peripheral Hardware 4 CHAPTER 3 SOFTWARE 5 3 1 File Configuration 5 3 2 Internal Peripheral Functions to Be Used 6 3 3 Initial Settings and Operation Overview 6 3 4 Flow Chart 7 CHAPTER 4 SETTING METHODS 8 4 1 Option Byte Sett...

Page 2: ...reof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC Electronics products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features NEC Electronics products are classified into the following three quality grades Standard Special and Specif...

Page 3: ...lock source Stopping watchdog timer operation Setting the CPU clock frequency and peripheral hardware clock frequency to 2 MHz Setting I O ports 2 Contents of main processing operation Lighting of the LEDs LED1 LED2 LED3 is controlled by detecting switch inputs SW1 SW2 with the 78K0S Kx1 microcontroller SW1 SW2 ON 78K0S Kx1 microcontroller Input LED1 LED2 LED3 Output Switch Input LED Output SW1 SW...

Page 4: ...onnect the AVREF pin directly to VDD only for the 78K0S KA1 and 78K0S KB1 microcontrollers 2 Connect the AVSS pin directly to GND only for the 78K0S KB1 microcontroller 3 Leave all unused pins open unconnected except for the pins shown in the circuit diagram and the AVREF and AVSS pins 2 2 Peripheral Hardware The peripheral hardware to be used is shown below 1 Switches SW1 SW2 These switches are u...

Page 5: ... z z initial prw Work space file for integrated development environment PM z initial prj Project file for integrated development environment PM z initial pri initial prs initial prm Project files for system simulator SM for 78K0S Kx1 zNote 2 initial0 pnl I O panel file for system simulator SM for 78K0S Kx1 used for checking peripheral hardware operations zNote 2 z initial0 wvo Timing chart file fo...

Page 6: ...controlled in accordance with the combination of the two switch inputs SW1 SW2 The details are described in the state transition diagram shown below Switch input identification Turning off all LEDs Lighting only LED1 Lighting only LED2 Lighting only LED3 SW1 OFF SW2 OFF Initial settings SW1 ON SW2 ON SW1 ON SW2 OFF SW1 OFF SW2 ON Option byte setting Selecting the high speed internal oscillator as ...

Page 7: ...ter setting Setting the CPU clock frequency and peripheral hardware clock frequency to 2 MHz Stopping the oscillation of the low speed internal oscillator Reading the switch input from the input port P4 I O port setting Extracting the LED output corresponding to the read input value Initial settings Option byte setting LED outputs LED1 to LED3 from the output port P2 ...

Page 8: ... Example 1 mentioned later Figure 4 1 Option Byte Format Address 0080H Note 1 Stopping the low speed internal oscillator oscillation stopping watchdog timer operation and setting the clock frequency are performed after reset release For details refer to 4 4 Watchdog Timer Setting and 4 5 Clock Setting Note 2 Caution and Remark are on the next page Control of low speed internal oscillator oscillati...

Page 9: ...To use C language prepare an assembly language source file file name asm arbitrary such as the one shown below specify it as the project source file and build it together with other source files main c Remark The protect byte address 0081H is used to set the prohibited areas for writing and block erasure whose set contents are valid only during self programming For details refer to the user s manu...

Page 10: ...uction and AT attribute are used to specify 0080H as the address Next the DB pseudo instruction is used to define values that are to be set to addresses following 0080H which are then described in the program coded in assembly language The DB and DW pseudo instructions can be used only in a ROM area specified with the CSEG pseudo instruction Descriptions of the DB or DW pseudo instructions in a RA...

Page 11: ...to 1 When the software is described together with the protect byte setting the following results 1 0 0 1 0 0 0 0 Control of low speed internal oscillator oscillation 0 Oscillation is stopped by software setting LSRSTOP bit is set to 1 Selection of system clock source 0 0 Crystal or ceramic oscillation clock 10 MHz MAX Selection of P34 RESET pin function 0 Used as a P34 pin Specification of oscilla...

Page 12: ...ESET_START 1A INTTM80 DW RESET_START 1C INTSRE6 DW RESET_START 1E INTSR6 DW RESET_START 20 INTST6 After reset release the program starts from the address RESET_START at 1 above specified with the reset vector In this sample program vector table addresses except 0000H are not used RESET_START is set to all remaining vector table addresses as with 0000H By setting in this way branching to RESET_STAR...

Page 13: ...xample address FF00H FEE0H 20H is specified for the stack pointer FF00H is not only a high speed RAM area but also an SFR area so it is converted into a high speed RAM area and the stack pointer becomes FB00H When actually storing data to the stack the stack pointer becomes FAFFH as a result of decrementing 1 FB00H into which FF00H was converted This however is not a high speed RAM area so it is c...

Page 14: ... During system clock operation 0 0 0 211 fRL 213 fX 0 0 1 212 fRL 214 fX Notes 1 When Watchdog timer operation stop is selected the overflow time setting is invalid don t care 2 To stop watchdog timer operation or to use the system clock as the watchdog timer operation clock the option byte must be used to set to Oscillation is stopped by software setting LSRSTOP bit is set to 1 For details refer ...

Page 15: ...low time is set to the maximum period 218 fRL same as the WDTM value after reset release WDTM To use the WDTM register as described above its setting value is the same as its value after reset release so setting by a program is not required 0 1 1 1 x x x x Operation clock selection 1 x Watchdog timer operation stopNote In this sample program the watchdog timer is not used for program loop detectio...

Page 16: ... create a program in C language the hdwinit function is called to initialize peripheral devices SFR immediately after CPU reset Initial settings such as the watchdog timer setting and clock frequency selection are therefore basically described in the hdwinit function The main function is called after calling the hdwinit function so main processing is described in the main function Do not call the ...

Page 17: ...125 kHz fCPU 10 MHz 3 0 to 4 0 V 125 kHz fCPU 6 MHz 2 7 to 3 0 V 125 kHz fCPU 5 MHz 500 kHz fXP 10 MHz Ceramic resonator crystal resonator external clock 2 0 to 2 7 VNote 125 kHz fCPU 2 MHz 500 kHz fXP 5 MHz 4 0 to 5 5 V 500 kHz TYP fCPU 8 MHz TYP 2 7 to 4 0 V 500 kHz TYP fCPU 4 MHz TYP 2 MHz TYP fXP 8 MHz TYP High speed internal oscillator 2 0 to 2 7 VNote 500 kHz TYP fCPU 2 MHz TYP 2 MHz TYP fXP...

Page 18: ... Setting The PPCC register setting value is 00000010 bits 2 to 7 must be set to 0 and the PCC register setting value is 00000000 bits 0 and 2 to 7 must be set to 0 For standard products and A grade products the detection voltage VPOC of the power on clear POC circuit is 2 1 V 0 1 V To satisfy the condition of power supply voltage 2 0 V setting condition of the CPU clock frequency in this sample pr...

Page 19: ...ils refer to 4 1 Option Byte Setting The PPCC register setting value is 00000001 bits 2 to 7 must be set to 0 and the PCC register setting value is 00000010 bits 0 and 2 to 7 must be set to 0 The clock frequency range that can be used varies depending on the power supply voltage so caution is required when setting the PPCC and PCC For details refer to Figure 4 3 Formats of Processor Clock Control ...

Page 20: ... used to set to Oscillation is stopped by software setting LSRSTOP bit is set to 1 For details refer to 4 1 Option Byte Setting Caution Bits 1 to 7 of LSRCM must be set to 0 Example 1 Oscillation stop of the low speed internal oscillator same as in the sample program setting Note To stop the low speed internal oscillator the option byte must be used to set to Oscillation is stopped by software set...

Page 21: ...nal oscillator is set to Cannot be stopped by using the option byte the LSRCM setting is invalid don t care For details refer to 4 1 Option Byte Setting The LSRCM register setting value is 00000000 bits 7 to 1 must be set to 0 Assembly language C language 0 0 0 0 0 0 0 0 Note Oscillation stop of low speed internal oscillator 0 Oscillation Application Note U18752EJ2V0AN 21 ...

Page 22: ...abilization Time Selection Register OSTS OSTS MOV OSTS 00000001B OSTS 0b00000001 Note When the high speed internal oscillation clock or an external clock input is selected as the system clock the OSTS setting is not required Caution Bits 7 to 2 must be set to 0 Example 1 Setting the oscillation stabilization time to 409 6 μs when a crystal or ceramic oscillation clock is used fX 10 MHz OSTS The OS...

Page 23: ...rmat is described taking the PM2 register as an example In this sample program port 2 is set as described in Example 1 mentioned later and port 4 as in Example 2 Figure 4 6 Format of Port Mode Register 2 PM2 PM2 Caution Bits 7 to 4 must be set to 1 2 Setting the output port output latch The Pxx registers are used to set output port output latches to high level or low level Output port output latch...

Page 24: ...2 register setting value is 11110000 bits 7 to 4 must be set to 1 and the P2 register setting value is 00000111 bits 7 to 4 must be set to 0 Assembly language C language 0 0 0 0 PU23 PU22 PU21 PU20 Selection of the P2n n 0 to 3 pin internal pull up resistor Internal pull up resistor is not connected 0 Internal pull up resistor is connected 1 PM2 1 1 1 1 0 0 0 0 Selection of the P2n n 0 to 3 pin I ...

Page 25: ...x x 1 Selection of the P40 and P43 pin I O modes 1 Input mode 78K0S KA1 0 Note 0 Note x x 1 x x 1 Selection of the P40 and P43 pin I O modes 1 Input mode 78K0S KU1 0Note 0Note 0Note 0Note 1 0Note Note 0 1 Selection of the P40 and P43 pin I O modes 1 Input mode In this sample program P40 and P43 are used as switch input ports so P40 and P43 are set as input ports PU4 78K0S KB1 78K0S KY1 x x x x 1 x...

Page 26: ...CHAPTER 4 SETTING METHODS Assembly language MOV PM4 00001001B MOV PU4 00001001B C language PM4 0b00001001 PU4 0b00001001 Application Note U18752EJ2V0AN 26 ...

Page 27: ...B 00000111B 05 Dummy DB 00000111B 06 Dummy DB 00000111B 07 Dummy DB 00000110B 08 SW1 ON SW2 OFF LED1 ON DB 00000111B 09 SW1 OFF SW2 OFF LED1 2 3 OFF MOVW HL LEDDATA Set the table address to the HL register Main loop MAIN_LOOP MOV A P4 Read switch input status AND A 00001001B Mask the data except the switch input status MOV L A Set switch input status to the lower 8 bits of the table address MOV A ...

Page 28: ...d char OUTDATA 10 0x03 0x05 0x07 0x07 0x07 0x07 0x07 0x07 0x06 0x07 Array of LED output pattern unsigned char INDATA Switch input variable while 1 INDATA P4 0b00001001 Valid switch input status P2 OUTDATA INDATA Read LED output data from the table The correspondences between the input data and output data are as follows Switch Input P40 P43 INDATA OUTDATA LED Lighting SW1 ON SW2 ON P40 0 P43 0 0b0...

Page 29: ...artup Guide Application Note for how to build other downloaded programs For the details of how to operate PM refer to the PM Project Manager User s Manual Column Build errors Change the compiler option setting according to the following procedure when the error message A006 File not found C NECTOOLS32 LIB78K0S s0sl rel or ERROR F206 Segment DATA can t allocate to memory ignored is displayed when b...

Page 30: ...k Open A workspace into which the source file will be automatically read will be created 3 Select Project Settings from the Project menu When the Project Settings window opens select the name of the device to be used the device with the largest ROM or RAM size will be selected by default and click OK Click This will be displayed when the device name is changed Click Click ...

Page 31: ...e SM System Simulator Operation User s Manual 1 When SM for 78K0S Kx1 W1 02 SM hereafter is used in the environment of PM Ver 6 30 SM cannot be selected as the debugger In this case start SM via method a or b described below while keeping PM running after completing building a project a When starting SM in PM 1 Select Register Ex tool from the Tool menu and register SM for 78K0S Kx1 2 Select Ex to...

Page 32: ...will be displayed when SM is started This is a sample screenshot of when an assembly language source file downloaded by clicking the icon was used 3 Click Restart button The program will be executed after the CPU is reset and the following screen will be displayed Click This turns red during program execution ...

Page 33: ...g chart window Example 2 SW1 OFF SW2 ON I O panel window Timing chart window Example 3 SW1 ON SW2 ON I O panel window Timing chart window Example 4 SW1 OFF SW2 OFF I O panel window Timing chart window Remark H High level L Low level ON Only LED1 lights up P40 L input P43 H input P20 L output P21 H output P22 H output ON Only LED2 lights up P40 H input P43 L input P20 H output P21 L output P22 H ou...

Page 34: ...e field and click the OK button to register P2 in the Watch window and close the Add Watch window 5 Execute the program and click the SW1 and SW2 buttons in the I O panel window Check that the data values of P2 and P4 in the Watch window change depending on the combination of the SW1 and SW2 buttons Combination of SW1 and SW2 Data Value in Watch Window SW1 ON SW2 OFF P2 0x06 P4 0x08 SW1 OFF SW2 ON...

Page 35: ...anguage PDF RA78K0S Assembler Package User s Manual Operation PDF Language PDF CC78K0S C Compiler User s Manual Operation PDF PM Project Manager User s Manual PDF SM System Simulator Operation User s Manual PDF 78K0S KU1 PDF 78K0S KY1 PDF 78K0S KA1 PDF Flash Programming Manual Basic MINICUBE2 version 78K0S KB1 PDF Sample Program Startup Guide PDF 78K0S Kx1 Application Note Sample Program Interrupt...

Page 36: ...e controlled by two switches Principal setting contents in initialization Set the vector table Set the stack pointer Stop the watchdog timer operation Set the CPU clock frequency at 2 MHz Stop the low speed internal oscillator Set the ports to the input or output mode Set the connection of on chip pull up resistors input port only Set the output latches of the output ports Switch input and LED out...

Page 37: ...RT 1A INTTM80 DW RESET_START 1C INTSRE6 DW RESET_START 1E INTSR6 DW RESET_START 20 INTST6 Define the ROM data table XTBL1 CSEG AT 0100H LEDDATA DB 00000011B 00 SW1 ON SW2 ON LED3 ON DB 00000101B 01 SW1 OFF SW2 ON LED2 ON DB 00000111B 02 Dummy DB 00000111B 03 Dummy DB 00000111B 04 Dummy DB 00000111B 05 Dummy DB 00000111B 06 Dummy DB 00000111B 07 Dummy DB 00000110B 08 SW1 ON SW2 OFF LED1 ON DB 00000...

Page 38: ... PM0 11110000B Set P00 P03 as output mode MOV P0 00000000B Set output latches of P00 P03 as low Initialize the port 2 MOV PM2 11110000B Set P20 P23 as output mode MOV P2 00000111B Set output latches of P20 P22 as high P23 as low Initialize the port 3 MOV PM3 11110000B Set P30 P33 as output mode MOV P3 00000000B Set output latches of P30 P33 as low Initialize the port 4 MOV PM4 00001001B Set P40 an...

Page 39: ...register MOVW HL LEDDATA Set the table address to the HL register Main loop MAIN_LOOP MOV A P4 Read switch input status AND A 00001001B Mask the data except the switch input status MOV L A Set switch input status to the lower 8 bits of the table address MOV A HL Read LED output data from the table MOV P2 A Output the LED light BR MAIN_LOOP Go to the MAIN_LOOP end ...

Page 40: ...tion Stop the watchdog timer operation Set the CPU clock frequency at 2 MHz Stop the low speed internal oscillator Set the ports to the input or output mode Set the connection of on chip pull up resistors input port only Set the output latches of the output ports Switch input and LED output SW1 SW2 LED1 LED2 LED3 P40 P43 P20 P21 P22 OFF OFF OFF OFF OFF ON OFF ON OFF OFF OFF ON OFF ON OFF ON ON OFF...

Page 41: ...de P0 0b00000000 Set output latches of P00 P03 as low Initialize the port 2 PM2 0b11110000 Set P20 P23 as output mode P2 0b00000111 Set output latches of P20 P22 as high P23 as low Initialize the port 3 PM3 0b11110000 Set P30 P33 as output mode P3 0b00000000 Set output latches of P30 P33 as low Initialize the port 4 PM4 0b00001001 Set P40 and P43 as input mode P41 P42 and P44 P47 as output mode PU...

Page 42: ... 1 INDATA P4 0b00001001 Valid switch input status P2 OUTDATA INDATA Read LED output data from the table z op asm Common to assembly language and C language versions Option byte OPBT CSEG AT 0080H DB 10011100B Option byte area Low speed internal oscillator can be stopped by software High speed internal oscillation clock 8MHz is selected for system clock source P34 RESET pin is used as RESET pin DB ...

Page 43: ...he manual Interrupt preliminary name under preparation Sample Program Interrupt External Interrupt Generated by Switch Input p 29 CHAPTER 5 OPERATION CHECK USING SYSTEM SIMULATOR SM Modification of description in Caution as of April 2007 as of July 2008 pp 29 to 31 Modification of 5 1 Building the Sample Program p 31 5 2 Operation with SM Addition of 1 2nd edition September 2008 p 35 CHAPTER 6 REL...

Page 44: ...l 02 8175 9600 http www tw necel com NEC Electronics Singapore Pte Ltd 238A Thomson Road 12 08 Novena Square Singapore 307684 Tel 6253 8311 http www sg necel com NEC Electronics Korea Ltd 11F Samik Lavied or Bldg 720 2 Yeoksam Dong Kangnam Ku Seoul 135 080 Korea Tel 02 558 3737 http www kr necel com For further information please contact G0706 Europe NEC Electronics Europe GmbH Arcadiastrasse 10 4...

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