653
/
838
Nations Technologies Inc.
Tel
：
+86-755-86309900
：
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
Figure 23-13 Mute mode detected using address mark
23.4.10
Synchronous mode
USART supports synchronous serial communication. The USART only supports the master mode, and cannot use
the input clock from other devices to receive and transmit data. Synchronous mode can be enabled by configuring
the USART_CTRL2.CLKEN bit.
Note: When using synchronous mode, USART_CTRL2.LINMEN, USART_CTRL3.SCMEN, USART_CTRL3.HDMEN,
USART_CTRL3. IRDAMEN, these bits need to be kept clear.
Synchronized clock
The CK pin is the output of the USART transmitter clock. During the bus idle period, before the actual data arrives
and when the break symbol is sent, the clock not output.
Clock phase and polarity are software programmable and need to be configured when both the transmitter and
receiver are disabled. When the clock polarity is 0 (USART_CTRL2.CLKPOL=0), the default level of CLK is low;
when the clock polarity is 1 (USART_CTRL2.CLKPOL=1), the default level of CLK is high. When the phase polarity
is 0 (USART_CTRL2.CLKPHA=0), the data is sampled on the first edge of the clock; when the phase polarity is 1
(USART_CTRL2.CLKPHA=1), the data is sampled on the second edge.
During the start and stop bits, the CK pin does not output clock pulses.
A sync data cannot be received when no data is sent. Because the clock is only available when the transmitter is
activated and data is written to the USART_DAT register.
The USART_CTRL2.LBCLK bit controls whether to output the clock pulse corresponding to the last data byte (MSB)
sent on the CK pin. This bit needs to be configured when both the transmitter and receiver are disabled. If
USART_CTRL2.LBCLK is 1, the clock pulse of the last bit of data will be output from CK. If
USART_CTRL2.LBCLK is 0, the clock pulse of the last bit of data is not output from CK.
Synchronized transmitting
The transmitter in synchronous mode works the same as in asynchronous mode. Data on the TX pin is sent out
synchronously with CK.
RX
RCVWU
RCVWU written to 1
（
RXDNE was cleared
）
Mute Mode
Normal Mode
IDLE
ADDR
=0
Data1
Data2
IDLE
ADDR
=1
Data3
Error address
RXDNE=1
Data4
Addr
=2
Data5
Mute Mode
Current address
Error address
In this example, the current address of the receiver is 1
RXDNE=1
RXDNE=1
