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Quick Start Guide

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6

SLAU662B – January 2016 – Revised May 2016

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Copyright © 2016, Texas Instruments Incorporated

ADS54J69EVM

2.2.2

ADS54J69EVM Setup

Next, setup the ADS54J69EVM using the following:

1. Connect the included 5-V power supply cable to connector J9 of the EVM. Connect the red wire to +5

VDC ±0.1 VDC of a power supply rated for at least 3 A. Connect the black wire to GND of the power
supply.

2. Turn on the 5-VDC power supply. The power draw should be around 0.66 A. When the board is

configured, it will draw approximately 1.12 A.

3. Connect one end of the included mini-USB cable to a host computer and the other end to the USB

connector J8, located on the backside of the board.

4. Set an analog input signal generator for 170 MHz, and about +15 dBm of power.

5. Place a narrow pass-band bandpass filter at the output of the signal generator to remove noise and

harmonics.

6. Connect the output of the filter to SMA connector AINP (J2) of the EVM.

2.3

Software Setup Procedure

The software can be opened and configured once the hardware is properly setup.

2.3.1

ADS54J69 GUI Configuration for Decimate-by-2 Low Pass Filter Mode

1. Open the ADS54Jxx EVM GUI by going to

Start Menu

All Programs

Texas Instruments ADCs

ADS54Jxx EVM GUI

.

2. Verify that the green

USB Status

indicator is lit in the top right corner of the GUI. If it is not lit, click the

Reconnect USB

button and check the

USB Status

indicator again. If it is still not lit, then verify the EVM

is connected to the computer through the included mini-USB cable.

3. Click on the

Low Level View

tab then click the

Load Config

button.

4. Navigate to

C:\Program Files(86)\Texas Instruments\ADS54Jxx EVM GUI\Configuration Files

, select

the file called

LMK_Config_Onboard_983p04_MSPS.cfg

, then click

OK

. This programs the LMK04828

to provide a 983.04 MHz clock to the ADC.

5. Verify that the LMK04828 phase lock loop (PLL) is locked by checking that the

PLL2 LOCKED

LED

(D2) is lit.

6. Once the LMK04828 PLL is locked, press SW1 (

ADC RESET

) to provide a hardware reset to the ADC.

This switch is located on the bottom left of the EVM.

7. In the

Low Level View

tab, click

Load Config

. Select the file called

ADS54J69_2x_dec_lowpass_4222.cfg

and click

OK

. The ADS54J69EVM is now configured for

decimation by 2 and using 4 JESD204B lanes.

Summary of Contents for ADS54J69

Page 1: ...n 4 2 2 Hardware Setup Procedure 5 2 3 Software Setup Procedure 6 2 4 Quick Start Trouble Shooting 9 3 Optimizing Evaluation Results 10 3 1 Clocking Optimization 10 3 2 Coherent Input Source 10 3 3 HSDC Pro Settings 10 4 Software Description 11 4 1 ADS54Jxx EVM GUI 11 4 2 Low Level View 12 5 Alternate Hardware Configurations 13 5 1 Clocking Options 13 5 2 Analog Input Options 14 Appendix A Jumper ...

Page 2: ...mlessly with the TSW14J56EVM Texas Instruments JESD204B data capture pattern generator card through the High Speed Data Converter Pro HSDC Pro software tool for high speed data converter evaluation The ADS54J69EVM was also designed to work with many of the development kits from leading FPGA vendors that contain an FMC connector 1 1 Required Hardware The following equipment is included in the EVM e...

Page 3: ...onverter Pro software version 4 1 or higher HSDC Pro GUI Updates Rev I for High Speed Data Converter Pro Software version 4 0 or lower 1 3 Evaluation Board Feature Identification Summary The EVM features are labeled in Figure 1 Figure 1 EVM Feature Locations 1 4 References ADS54Jxx EVM software available at www ti com tool ADS54J69EVM ADS54J69 datasheet SBAS713 available at www ti com product ADS5...

Page 4: ...sed to properly configure the devices on the EVM 1 Download the ADS54Jxx EVM GUI from the TI website The References section of this document contains links to find the software on the TI website 2 Extract the files from the zip file 3 Run setup exe and follow the installation prompts 2 1 2 High Speed Data Converter Pro GUI Installation High Speed Data Converter Pro HSDC Pro is used to control the ...

Page 5: ... setup using the ADS54J69EVM and TSW14J56EVM is shown in Figure 2 This is the test setup used for the quick start procedure The rest of this section describes the hardware setup steps Figure 2 Quick Start Test Setup 2 2 1 TSW14J56EVM Setup First setup the TSW14J56EVM using the following steps 1 Connect the ADS54J69EVM to the TSW14J56EVM using the FMC connectors 2 Connect one end of the provided 5 ...

Page 6: ...red once the hardware is properly setup 2 3 1 ADS54J69 GUI Configuration for Decimate by 2 Low Pass Filter Mode 1 Open the ADS54Jxx EVM GUI by going to Start Menu All Programs Texas Instruments ADCs ADS54Jxx EVM GUI 2 Verify that the green USB Status indicator is lit in the top right corner of the GUI If it is not lit click the Reconnect USB button and check the USB Status indicator again If it is...

Page 7: ...er Pro by going to Start Menu All Programs Texas Instruments High Speed Data Converter Pro The GUI main page looks as shown in Figure 4 Figure 4 HSDC Pro GUI Main Panel 2 When prompted to select the capture board select the TSW14J56 whose serial number corresponds to the serial number on the TSW14J56EVM and click OK This popup can be accessed through the Instrument Options menu 3 If no firmware is...

Page 8: ... box or press return on the PC keyboard 8 The GUI displays the new lane rate of the SerDes interface based off of the sample rate and other parameters from the loaded configuration files Click OK 9 Click the Instrument Options menu at the top of HSDC Pro and select Reset Board 10 Click Capture in HSDC Pro to capture data from the ADC 11 The results from the captured data of Channel 1 should look l...

Page 9: ...is not working properly Verify that the USB cable is plugged into the EVM and the PC Check the computer s Device Manager and verify that a USB Serial Device is recognized when the EVM is connected to the PC Verify that the green USB Status LED light in the top right corner of the GUI is lit If it is not lit press Reconnect FTDI button Try restarting the configuration GUI Check default jumper conne...

Page 10: ... are set precisely to capture an integer number of cycles of the input frequency sometimes called coherent frequency This may yield better SNR results The clock and analog inputs must be frequency locked such as through 10 MHz references in order to achieve coherency 3 3 HSDC Pro Settings HSDC Pro has some settings that can help improve the performance measurements These are highlighted in Table 3...

Page 11: ...cription ADS54Jxx Enables control of the ADS54Jxx features None of these controls need to be touched for basic operation Instead use the Low Level View tab to load configuration files LMK04828 Enables control of many of the LMK04828 features Configuration files can be used to setup the LMK04828 in known working configurations however this tab can be used to setup more advanced clocking schemes Low...

Page 12: ...Write Data field This button must be clicked after changing bits in the register data section Write All button Update all registers shown in the Register Map with the values shown in the Register Map log The log can be viewed by double left clicking in the bottom left status bar of this page Read Register button Read from the register highlighted in the Register Map and display the results in the ...

Page 13: ...o be uninstalled and installed at C64 and C72 The LMK04828 must still be used to provide the device clock to the TSW14J56 and the SYSREF signals to both boards This option provides the best performance as long as the clock source has better phase noise performance than the LMK04828 The source of the EXT ADC clock must be synchronized with the LMK04828 To accomplish this send the 10 MHz reference o...

Page 14: ...n the onboard VCXO The internal PLLs of the LMK04828 can be used with the onboard VCXO to generate the desired frequencies To use this mode load one of the configuration files named LMK_Config_Onboard_xxxx_MSPS cfg where xxxx corresponds to the desired ADC sampling rate A 10 MHz signal can be brought into the LMK_CLKIN1 input to synchronize to external instruments This is the board default mode of...

Page 15: ...1 Default is power on Shunt pins 1 2 SJP1 Selects either 3 3 V or GND for Y1 enable Default is open Open SJP3 Selects either diff sync or single ended sync from FMC Default is diff Shunt pins 2 3 A 2 Connector Descriptions The EVM connectors and their function are described in Table 7 Table 7 Connector Descriptions Connector Description J2 Channel A positive analog input J1 Not installed Channel A...

Page 16: ...used D4 5 VDC power present D2 LMK04828 locked to VCXO D1 VCXO locked to external reference applied to J6 Revision History NOTE Page numbers for previous revisions may differ from page numbers in the current version Changes from A Revision January 2016 to B Revision Page Deleted ADS54J69 GUI Configuration for Decimate by 4 with Digital Mixer section from Software Setup Procedure section 6 Deleted ...

Page 17: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Page 18: ... by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la rég...

Page 19: ... connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors cu...

Page 20: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Page 21: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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