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Appendix B
VXIpc-850 System Resources
© National Instruments Corporation
B- 3
VXIpc-850 Series User Manual
Table B-3. I/O Address Map
I/O
Address
Device
I/O
Address
Device
000-00F
8237 DMA #1
2E8-2EF
COM*
020 -021
8259 PIC #1
2F8-2FF
COM*
040-043
8253 Timer
300-30F
Ethernet
060-066
8742 Controller
310-36F
Free
070-077
CMOS RAM & NMI Mask Reg
370-377
Reserved
078-07B
BIOS Timer
378-37F
LPT*
080-090
DMA Page Registers
380-3B0
Free
092
Reserved
3BC-3BF
LPT*
094-09F
DMA Page Registers
3E8-3EF
COM*
0A0-0A1
8259 PIC #2
3F0-3F7
Floppy
0B2-0B3
Advanced Power Management
3F8-3FF
COM*
0C0-0DF
8237 DMA #2 (word mapped)
40A
Scatter/Gather Int Status Reg
0F0-0FF
Numeric Processor Error Reg
40B
DMA1 Extended Mode Regs
170-177
Reserved
410-41F
Scatter/Gather Status
1F0-1F7
IDE
420-43F
Scatter/Gather Descriptor Table
Pointer
200-270
Free
481-488
DMA High Page Regs
278-27F
LPT*
4D0-4D1
Interrupt Edge/Level Control Regs
280-2DF
Free
4D6
DMA2 Extended Mode Regs
2C0-2DF
GPIB
*
Relocatable
Note:
I/O locations in italics indicate addresses above 1 KB. These locations are
not usually accessible in an ISA-based system; however, newer PCI-based
chipsets have increased the amount of I/O space available.