Configuration and Installation
Chapter 2
SCXI-1163 User Manual
2-22
© National Instruments Corporation
To write to the Data Register, follow these steps:
1. Initial conditions:
SS* asserted low.
SERDATIN = don't care.
DAQD*/A = 0 (indicates data will be written to a Register).
SLOT0SEL* = 1.
SERCLK = 1 (and has not transitioned since DAQD*/A went low).
2. For each bit to be written:
Establish the desired SERDATIN level corresponding to this bit.
SERCLK = 0.
SERCLK = 1. This rising edge clocks the data.
3. Pull DAQD*/A high. This disables further writes to the module Data Register and latches
the information to the outputs. If you want, you can write address FFFF (hexadecimal) to the
Address Handler. This selects the Parking Register and makes the module registers more
immune to noise.
4. Pull low to deassert the SS* line and establish conditions for writing a new slot-select
number to the Slot 0 Slot-Select Register.
5. If you are not selecting another slot, write zero to the Slot 0 Slot-Select Register.
Figure 2-8 illustrates a write to the SCXI-1163 Data Register of the binary pattern:
10000011 00001111 00000000 00000000
SLOT0SEL*
SERDATIN
SERCLK
SS*
DAQD*/A
T
delay1
T
delay2
T
delay1
DAQD*/A low to SERCLK first falling edge
T
delay2
SERCLK last rising edge to DAQD*/A high
T
delay3
DAQD*/A high to SLOTSEL* low
T
delay3
1 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
180 nsec
365 nsec
400 nsec
Figure 2-8. Data Register Write Timing Diagram