Chapter 3
Connecting the Signals
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National Instruments Corporation
3-7
SCXI-1141/1142/1143 User Manual
Digital Input and Output
You can use the EXTCLK input pin on the front connector of the
SCXI-1141/1142/1143 module to control filter cutoff frequency for special
purposes. The clock should be a TTL-logic-level or CMOS-logic-level
square wave, with a frequency of less than 2.5 MHz that is 100 times the
desired cutoff frequency. The absolute maximum input voltage for the
EXTCLK pin is 5.5 V with respect to DGND; the minimum input voltage
is –0.5 V.
The OUTCLK pin on the front connector is a CMOS-logic-level output
clock, which you can configure to have a frequency that is proportional to
filter cutoff frequency.
See Chapter 4,
, for more details on using these
two signals.